Flash Memory Controller Multithreading for Response Time
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Solution Overview
Problem
Semiconductor memory devices face challenges in responding in real time due to operations like garbage collection and wear leveling, which can delay response times to host requests, especially when these operations are performed concurrently with access requests.
Innovation Solution
A nonvolatile memory system with a controller that executes a second access operation before completing a first access operation, suspends operations when time is over, and resumes them during idle times, using multithreading techniques to manage access requests efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If garbage collection and wear leveling operations are performed concurrently with access requests, then memory management reliability is improved, but response time to host requests deteriorates
Solution Approach 1:
The patent implements dynamic operation prioritization where the controller can switch between background operations (garbage collection, wear leveling) and foreground access operations based on real-time host request status. When host requests are pending, background operations are suspended or delayed; when no host requests are pending, background operations proceed. This dynamic adjustment resolves the contradiction by making the system flexible enough to prioritize reliability tasks when they don't conflict with response time requirements.
Solution Approach 2:
The patent performs preliminary checks for pending host requests before initiating background operations like garbage collection and wear leveling. By checking the status of access requests in advance and postponing background operations if requests are pending, the system prevents time loss to host requests while still achieving memory management reliability through timely execution of background tasks when conditions permit.
2Productivity
If multithreading is implemented to execute multiple access operations, then productivity is improved, but device complexity increases
Solution Approach 1:
The patent segments access operations into distinct threads with different priorities (foreground threads for host requests, background threads for memory management tasks). Each thread is independently managed with its own execution context and priority level. This segmentation enables the controller to handle multiple operations concurrently while maintaining clear organizational structure, thus improving productivity without overwhelming complexity.
Solution Approach 2:
The patent introduces a thread management mechanism that acts as an intermediary between multiple access operations and the execution engine. This mediator handles thread scheduling, priority assignment, and context switching, allowing the system to execute multiple operations efficiently while centralizing the complexity management in a dedicated control structure rather than dispersing it throughout the entire system.
Data Source
AI summary
A memory system is provided with a processor, a main memory, and a flash memory. Performance of the memory system is improved through achievement of speed-up and high data reliability. The memory system includes a nonvolatile memory device and a controller configured to drive a control program to control the nonvolatile memory device. The control program executes a second access operation for the nonvolatile memory device even before a first access operation to the nonvolatile memory device is completed.