Flash Memory Controller Coding Matrix for Variable Page Sizes

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional flash memory controllers support only one coding mode corresponding to a fixed data length, failing to accommodate flash memory devices with varying page sizes from different vendors.

Innovation Solution

A flash memory controller with a multi-mode encoding and decoding scheme, incorporating an encoder and decoder circuit capable of dynamic coding matrix selection, supports different page sizes by generating and correcting error correction codes adaptively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a conventional flash memory controller supports only one coding mode with fixed data length, then the coding scheme is simple and hardware resources are reduced, but it cannot accommodate flash memory devices with varying page sizes from different vendors

Engineering Contradiction:
Improvesupport for different page sizesVSAvoidcoding mode configuration
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements dynamic coding mode selection where the flash memory controller can switch between different coding modes (first coding mode for first page size, second coding mode for second page size) based on the detected page size of the flash memory device. This dynamic adaptation allows the system to accommodate varying page sizes while using a unified hardware architecture, resolving the contradiction between versatility and complexity.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the coding parameters (coding mode, error correction code generation rules) based on the page size parameter of the flash memory device. By adjusting these parameters dynamically, the controller can support different page sizes without requiring separate dedicated hardware for each coding mode, thus improving adaptability while controlling complexity.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If the flash memory controller uses dynamic coding matrix selection to support multiple page sizes, then adaptability to different vendors' devices is improved, but the complexity of determining and switching coding modes increases

Engineering Contradiction:
Improvemulti-vendor compatibilityVSAvoidcoding matrix selection mechanism
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent performs preliminary detection of the flash memory device's page size before encoding operations. Based on this pre-detection, the controller pre-determines which coding mode to use and configures the coding matrix accordingly. This preliminary action avoids complex real-time calculations during data encoding, simplifying the overall selection mechanism while maintaining multi-vendor compatibility.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses a unified coding matrix structure that can be configured to represent different coding modes. Instead of maintaining separate coding matrices for each page size, the system copies and configures a single master coding matrix to match the required coding mode, reducing the complexity of storing and switching between multiple coding matrices while achieving adaptability.

Inventive Principle:
Principle #26Copying

3Reliability

If error correction codes are generated and corrected adaptively for different page sizes, then decoding capability is optimized, but power consumption increases due to additional processing operations

Engineering Contradiction:
Improveerror correction capabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies error correction coding adaptively based on the page size and error conditions. Instead of always applying maximum error correction, the system uses partial error correction (first error correction code for first page size, second error correction code for second page size) appropriate to the actual needs. This partial action reduces unnecessary processing and power consumption while maintaining sufficient error correction capability.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The patent incorporates feedback mechanisms where the controller detects the page size of the flash memory device and adjusts the error correction coding accordingly. The feedback loop ensures that error correction resources are allocated efficiently based on actual error conditions and page size, optimizing the balance between reliability and power consumption by avoiding excessive error correction processing when not needed.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20260111310A1Flash memory controller and coding method supporting multi-coding mode coding operations in response to different page sizes
Publication Date: 2026.04.23 SILICON MOTION INC
  • US20260111310A1 patent drawing
  • US20260111310A1 patent drawing
  • US20260111310A1 patent drawing

AI summary

A coding method of a flash memory controller includes: performing a local encoding operation upon a data unit to be written into a portion of a page unit of the flash memory device and to perform a global encoding operation upon multiple data units to be written into the page unit according to a coding matrix so as to generate and write error correction code data into the page unit; performing a local decoding operation upon the data unit read from the portion of the page unit and to perform a global decoding operation upon the multiple data units read from the page unit according to the error correction code data corresponding to the coding matrix to obtain correct data of the page unit; and, dynamically determining the coding matrix to dynamically select a coding mode.