Flash Memory Controller PLC Adjustment via Decode Time
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Solution Overview
Problem
Data storage devices face a trade-off between bit error rate (BER) and programming time due to the number of program loop cycles (PLCs) used in programming operations, where increasing PLCs reduces BER but increases programming time, and decreasing PLCs reduces time but increases BER, necessitating an improved method to determine optimal PLCs.
Innovation Solution
A data storage device with a controller that determines the decode time for encoded data and adjusts the number of PLCs based on this time, comparing it to a threshold to optimize programming, thereby controlling read performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the number of program loop cycles (PLCs) is increased, then the bit error rate (BER) decreases, but the programming time increases
Solution Approach 1:
The patent applies dynamics by making the number of PLCs adjustable rather than fixed. The system dynamically determines the optimal number of PLCs based on measured decode times from previous operations, allowing the programming process to adapt to actual performance characteristics and optimize the balance between reliability and time
Solution Approach 2:
The patent changes the parameter of PLC count based on measured decode time performance. By monitoring actual decode times and adjusting the PLC parameter accordingly, the system optimizes the trade-off between error rate and programming time through parameter adaptation
2Productivity
If the number of program loop cycles (PLCs) is decreased, then the programming time decreases, but the bit error rate (BER) increases
Solution Approach 1:
The system dynamically adjusts the PLC count based on measured decode times, enabling the programming operation to adapt to actual performance requirements and optimize the balance between speed and reliability
Solution Approach 2:
The PLC parameter is adjusted based on empirical decode time measurements, allowing the system to find the optimal point that maximizes programming speed while maintaining acceptable error rates
3Ease of operation
If a fixed number of PLCs is used for all data, then the programming process is simple, but the read performance cannot be optimized
Solution Approach 1:
The system transitions from a static, fixed PLC approach to a dynamic, adaptive approach where the PLC count is determined based on measured decode times, optimizing read performance while maintaining operational simplicity through automated determination
Solution Approach 2:
The system performs preliminary measurements of decode time before finalizing the PLC count for programming operations. This preliminary action allows the system to pre-determine the optimal PLC value, eliminating the need for complex real-time adjustments during programming
Data Source
AI summary
A data storage device includes a memory device and a controller coupled to the memory device. When a program operation occurs, the controller is configured to determine a decode time for the data prior to programming the data to the memory device. The decode time determined by decoding the encoded data. A number of program loop cycles is determined using the decode time. The data is programmed to the memory device with the number of program loop cycles determined.

