Flash Controller Pre-Command Transmission for NAND Latency Reduction
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Solution Overview
Problem
The increasing NAND command transmission time in flash storage devices negatively impacts their performance, despite advancements in NAND flash I/O speed.
Innovation Solution
A data storage device and operating method that involve a controller generating and transmitting a pre-command to the nonvolatile memory apparatus before completing remaining operations, allowing for simultaneous pre-command transmission and operation processing, thereby reducing NAND command transmission time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the controller waits to complete all operations before transmitting the NAND command, then the command processing is accurate and complete, but the NAND command transmission time increases and performance deteriorates
Solution Approach 1:
The controller performs preliminary operations (FTL translation, parameter preparation) and transmits the pre-command to the NAND flash memory in advance, before all processing operations are complete. This allows the NAND flash memory to begin processing earlier, reducing overall command transmission time while maintaining accuracy through subsequent confirm commands.
2Productivity
If the controller transmits the pre-command early to reduce transmission time, then performance improves, but the complexity of command management increases
Solution Approach 1:
The command transmission process is segmented into two distinct parts: a pre-command containing essential parameters (address, operation type) that can be transmitted early, and a confirm command containing remaining parameters transmitted after all operations are complete. This segmentation allows early performance improvement while managing complexity through structured separation of command components.
3Manufacturing precision
If the controller performs all operations sequentially before command transmission, then the processing is thorough, but the data access speed decreases
Solution Approach 1:
The controller performs critical preliminary actions (logical-to-physical address translation, operation type determination) before transmitting the pre-command, ensuring processing thoroughness for essential parameters. Meanwhile, the NAND flash memory begins processing these parameters in parallel, improving data access speed without sacrificing processing quality.
Solution Approach 2:
The useful action of command processing continues uninterrupted by overlapping controller operations with NAND flash memory processing. The controller transmits the pre-command while still completing remaining operations, and the NAND flash memory continuously processes the received command parameters, eliminating idle waiting time and improving overall speed.
Data Source
AI summary
A data storage device may include a nonvolatile memory apparatus and a controller. The controller may be configured to translate a logical address into a physical address when receiving a host command (such as a write command or a read command) including the logical address from a host device, to generate a pre-command including the physical address, to transmit the generated pre-command to the nonvolatile memory apparatus before completing one or more remaining operations of the operations used to process the host command, and to transmit a confirm command to the nonvolatile memory apparatus when the remaining operations are complete. The controller may perform the remaining operations and the transmission of the pre-command to the nonvolatile memory apparatus at the same time.