Flash Memory Controller with Adaptive Punctured Error Correction
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Solution Overview
Problem
NAND flash memory devices face challenges in efficiently managing error correction and storage density due to limitations in existing error correction codes, which can lead to uncorrectable errors and reduced storage reliability as the memory wears out.
Innovation Solution
Implementing a rate-compatible convolutional code system that dynamically adjusts the code rate by puncturing convolutionally encoded data, allowing for varying levels of error correction redundancy and storage efficiency through an inner and outer concatenated error correction code scheme.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If block codes with fixed error correction capability are used, then error correction reliability is maintained within limits, but storage density and service life are reduced when memory wears out and errors exceed correction capability
Solution Approach 1:
The patent implements dynamic error correction by transitioning from fixed block codes to rate-compatible convolutional codes that can adapt their code rate in real-time. The system monitors memory wear and error patterns, then dynamically adjusts the code rate to maintain optimal error correction capability throughout the memory's service life, extending usable lifespan while preserving reliability.
Solution Approach 2:
The system changes the code rate parameter of the error correction code based on memory wear level and error characteristics. By varying the code rate dynamically rather than using a fixed rate, the system optimizes the balance between error correction capability and storage efficiency at different stages of memory degradation.
2Reliability
If higher error correction redundancy is used, then data integrity is improved, but storage density and effective capacity are reduced
Solution Approach 1:
The system dynamically adjusts the amount of redundancy inserted into stored data by varying the code rate of convolutional codes. When memory is healthy, lower redundancy is used to maximize storage density. As wear increases or error rates rise, the system automatically increases redundancy to maintain data integrity, optimizing the trade-off between storage capacity and reliability under different operating conditions.
3Device complexity
If fixed code rate error correction is implemented, then implementation simplicity is maintained, but adaptability to varying error conditions and memory wear is limited
Solution Approach 1:
The patent implements a dynamic code rate selection mechanism that adapts to varying error conditions and memory wear levels. The system monitors error patterns and wear status, then selects appropriate code rates from a set of rate-compatible convolutional codes, providing adaptability while maintaining relatively simple implementation through standardized code structures.
Solution Approach 2:
The system changes the code rate parameter based on detected error conditions and wear levels, allowing the same error correction framework to handle diverse scenarios from early-stage memory with low errors to worn memory with high error rates, significantly improving adaptability without requiring completely different correction schemes.
Data Source
AI summary
Apparatus and methods store data in a non-volatile solid state memory device according to a rate-compatible code, such as a rate-compatible convolutional code (RPCC). An example of such a memory device is a flash memory device. Data can initially be block encoded for error correction and detection. The block-coded data can be further convolutionally encoded. Convolutional-coded data can be punctured and stored in the memory device. The puncturing decreases the amount of memory used to store the data. Depending on conditions, the amount of puncturing can vary from no puncturing to a relatively high amount of puncturing to vary the amount of additional error correction provided and memory used. The punctured data can be decoded when data is to be read from the memory device.