Flash Memory Controller Read-Disturbance Block Selection

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Solution Overview

Problem

Flash memory cells experience threshold voltage distribution changes due to retention and read disturbances, leading to erroneous data reads, especially under high temperatures, which existing technologies fail to adequately address.

Innovation Solution

A flash memory controller method that determines blocks prone to read disturbances by tracking read counts and time stamps, using a read count and threshold time mapping table to identify blocks for garbage collection, ensuring only those with significant shifts are targeted for data relocation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If flash memory is used for data storage, then high storage density and low cost per bit are achieved, but threshold voltage distribution changes due to retention and read disturbances cause erroneous data reads

Engineering Contradiction:
Improvestorage densityVSAvoiddata read accuracy
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The system proactively identifies blocks prone to read disturbances by tracking read counts and time stamps before actual read errors occur. By calculating time differences and comparing against a mapping table, the system relocates data from at-risk blocks to safe blocks in advance, preventing erroneous reads rather than detecting them after they happen.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system continuously monitors block usage patterns through read counts and time stamps, using this feedback to dynamically identify blocks requiring garbage collection. The mapping table stores historical data that provides feedback on the relationship between read frequency, retention time, and threshold voltage shifts, enabling adaptive block management.

Inventive Principle:
Principle #23Feedback

2Reliability

If all blocks are subjected to garbage collection operation, then data integrity is improved, but system efficiency and productivity deteriorate due to unnecessary data relocation

Engineering Contradiction:
Improvedata integrityVSAvoidsystem efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

Instead of applying garbage collection uniformly to all blocks, the system identifies specific blocks with local quality issues by analyzing individual block characteristics (read count, time stamp, calculated age). The mapping table provides threshold values that vary based on read frequency and retention time, enabling selective garbage collection only for blocks that exceed the disturbance thresholds.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system uses parameter changes in the mapping table that correlate read count and threshold time to determine garbage collection necessity. By adjusting the criteria based on these parameters, the system dynamically determines which blocks require intervention, optimizing the balance between data integrity and system efficiency.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If read count and time stamp tracking is implemented, then blocks prone to read disturbance are accurately identified, but device complexity increases

Engineering Contradiction:
Improveblock identification accuracyVSAvoidcontroller complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The flash memory blocks essentially tag themselves for garbage collection by having their read counts and time stamps automatically tracked by the controller. The mapping table serves as a reference that requires minimal processing, and the system self-identifies problematic blocks through simple comparisons rather than requiring complex analysis algorithms.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12547336B2Control method of memory device and associated flash memory controller
Publication Date: 2026.02.10 SILICON MOTION INC
  • US12547336B2 patent drawing
  • US12547336B2 patent drawing
  • US12547336B2 patent drawing

AI summary

The present invention provides a control method of a flash memory controller, wherein the flash memory controller is configured to access a flash memory module, and the flash memory module includes a plurality of blocks. The control method includes the steps of: obtaining a read count of a specific block; obtaining a time stamp of the specific block, wherein the time stamp is a write time of the specific block; calculating a time difference between a current system time and the time stamp of the specific block; and using the read count of the specific block and the time difference, and referring to a read count and threshold time mapping table to determine whether to arrange the specific block in a garbage collection pool.