Flash Memory Controller Read Command Optimization
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional flash memory systems experience inefficiencies in data reading due to the need for repeated general read commands for consecutive logic addresses, leading to increased execution time and suboptimal storage performance despite advancements in transmission speed.
Innovation Solution
Implementing a flash memory controller that uses both general and cache read commands to sequentially read data, allowing for concurrent data transmission and pre-reading of subsequent pages, thereby reducing the time required to execute host read commands.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If general read commands are used for each consecutive logic address, then data can be read from the flash memory chip, but the execution time increases and storage performance deteriorates
Solution Approach 1:
The flash memory controller issues a read command to pre-read data from a subsequent physical address before the host system actually requests it. This preliminary action allows the data to be ready in the buffer when needed, eliminating wait time and improving storage performance without increasing execution time.
2Speed
If the flash memory controller waits for data uploading and internal data transferring to complete before issuing the next command, then the flash memory chip can process commands sequentially, but the overall read speed decreases
Solution Approach 1:
The flash memory controller continuously issues read commands to the flash memory chip without waiting for previous commands to complete. Multiple read operations are pipelined, allowing the controller to maintain continuous useful action and maximize read speed while the flash memory chip processes commands in the background.
Data Source
AI summary
A method for giving a read command to a flash memory chip to read data to be accessed by a host system is provided. The method includes receiving a host read command; determining whether the received host read command follows a last host read command; if yes, giving a cache read command to read data from the flash memory chip; and if no, giving a general read command and the cache read command to read data from the flash memory chip. Accordingly, the method can effectively reduce time needed for executing the host read commands by using the cache read command to combine the host read commands which access continuous physical addresses and pre-read data stored in a next physical address.


