Flash Memory Controller Soft-Bit Reading for QLC Decoding
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Solution Overview
Problem
Existing flash memory devices, particularly those with quadruple level cell (QLC) technology, face inefficiencies in access management due to high bit error rates and instability, which traditional sensing schemes fail to address effectively, especially in high-density storage arrangements.
Innovation Solution
A method involving a flash memory module and controller that uses multiple read voltages to obtain multi-bit information from each memory cell, with a control logic circuit to decode and de-randomize this information efficiently, improving data retrieval without introducing significant side effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional sensing schemes are used for reading data from QLC flash memories, then the existing read mechanism can be maintained, but the bit error rate increases and decoding fails in high-density storage arrangements
Solution Approach 1:
The patent segments the reading process into multiple stages: first reading sign bits using traditional sensing schemes, then reading soft bits using additional read voltages. This segmentation allows the system to handle high-density storage by processing different types of information (sign bits for basic data, soft bits for error correction) separately and sequentially, thereby reducing bit error rates while maintaining compatibility with existing read mechanisms.
Solution Approach 2:
The patent performs preliminary reading of sign bits before attempting full data recovery. By first obtaining the sign bits using traditional sensing schemes and then using this information to guide subsequent soft bit reading operations, the system prepares the decoding process in advance, improving the likelihood of successful data recovery in high-density storage arrangements.
2Reliability
If multiple read voltages are applied to obtain soft bits, then decoding success rate improves, but read operation complexity increases
Solution Approach 1:
The patent introduces soft bits as an intermediary element between the physical memory states and the final decoded data. These soft bits, obtained through additional read voltages, serve as intermediate information that aids the error correction decoder in recovering data from degraded or noisy readings, thereby improving decoding success without requiring complete re-reading of all data.
Solution Approach 2:
The patent implements a feedback mechanism where the results of initial sign bit readings inform subsequent soft bit reading operations. The system uses the sign bit information to determine which additional read voltages to apply and how to process the soft bits, creating a feedback loop that optimizes the reading process and reduces unnecessary operations, thus managing complexity while improving reliability.
3Quantity of substance
If QLC flash memory is used to increase storage density, then capacity increases, but access control stability deteriorates
Solution Approach 1:
The patent changes the reading parameters by introducing multiple read voltages (different from the traditional single voltage approach) to obtain soft bits. This parameter change allows the system to extract additional information from the same memory cells without physically altering the storage density, thereby maintaining the high capacity of QLC while improving access control stability through enhanced error correction capabilities.
Data Source
AI summary
The present invention provides an electronic device, wherein the electronic device includes a flash memory module and a flash memory controller. The flash memory module includes at least one flash memory chip, each flash memory chip includes a plurality of blocks, and each block includes a plurality of pages, and the flash memory controller is configured to access the flash memory module. In the operations of the electronic device, when the flash memory controller sends a read command to the flash memory module to ask for data on at least one page, the flash memory module uses a plurality of read voltages to read each memory cell of the at least one page to obtain multi-bit information of each memory cell, and the flash memory module transmits the multi-bit information of each memory cell of the at least one page to the flash memory controller.