Flash Memory Controller State-Responsive Encoding
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Solution Overview
Problem
Existing flash memory systems face degradation in read throughput over time due to increased error rates and overhead from error correction decoding, especially as the number of program-erase cycles increases, leading to a tradeoff between reliability and speed.
Innovation Solution
Implement a state-responsive encoding and programming process that adjusts codeword length, interleaving schemes, and programming parameters based on the wear level of flash memory cells, using configurable ECC and varying voltage threshold distributions to maintain reliability and performance across the lifespan of the device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data is encoded at the granularity of the host (512 B chunks), then read performance is improved, but reliability deteriorates because the codeword is too short to provide adequate error correction
Solution Approach 1:
The patent segments the codeword into multiple sections, each section corresponding to a specific granularity level (e.g., 512 B chunks for host reads, larger sections for error correction). This allows the system to maintain short codewords for high read performance while incorporating sufficient redundancy for reliable error correction across the entire codeword structure.
Solution Approach 2:
The patent introduces a hierarchical dimension to the encoding structure, organizing data into nested levels of granularity (host-level 512 B chunks, page-level sections, and full codeword level). This multi-dimensional organization enables simultaneous optimization for both fast host access and robust error correction.
2Device complexity
If a single ECC configuration is used throughout the lifespan of the system, then device complexity is reduced, but reliability deteriorates as wear level increases and error rates rise
Solution Approach 1:
The patent implements dynamic ECC configuration that adapts to the wear level of the flash memory device. As the device ages and error rates increase, the system automatically adjusts ECC parameters (such as codeword length, redundancy level, and decoding algorithms) to maintain optimal reliability without requiring manual reconfiguration or increasing overall system complexity.
Solution Approach 2:
The patent changes key ECC parameters based on device state, including codeword length, redundancy bits, and decoding threshold levels. These parameter adjustments are made in response to wear indicators and error rate measurements, allowing the system to maintain high reliability throughout its operational lifespan while keeping the control mechanism integrated and manageable.
3Reliability
If DSP operations are performed to adapt read thresholds and minimize readout errors, then reliability is improved, but read throughput deteriorates due to increased overhead
Solution Approach 1:
The patent performs preliminary threshold adaptation and DSP operations during the programming phase rather than during read operations. By pre-characterizing the memory cell thresholds and storing this information, the system eliminates the need for time-consuming DSP operations during actual read requests, thereby maintaining high read throughput while ensuring reliable readout through pre-computed optimal thresholds.
Solution Approach 2:
The patent enables the flash memory system to self-characterize and self-optimize its read thresholds through initial programming operations. The system automatically determines optimal read thresholds and stores this calibration data, eliminating the need for continuous external DSP intervention during normal operation and maintaining high read performance without sacrificing reliability.
4Reliability
If multiple reads are performed to provide soft input to the decoder, then reliability is improved, but read throughput deteriorates due to multiple read operations
Solution Approach 1:
The patent applies partial multiple-read strategies that perform soft-input reads only when necessary, based on initial read results and error probability assessments. For most reads with low error probability, a single hard decision read suffices, maintaining high throughput. Only when error risk is detected does the system perform additional soft-input reads, thus achieving high reliability without the constant time penalty of multiple reads for every operation.
Data Source
AI summary
A non-transitory computer readable medium, a flash controller and a method for state responsive encoding and programming; the method may include encoding an information entity by applying a state responsive encoding process to provide at least one codeword; wherein the state responsive encoding process is responsive to a state of flash memory cells; and programming the at least one codeword to at least one group of flash memory cells by applying a state responsive programming process that is responsive to the state, the state being either an estimated state or an actual state.