Flash Memory Controller Code Bank Swapping via Super Block Multi-Plane Read
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Solution Overview
Problem
In conventional flash memory systems, the limited buffer capacity leads to frequent swapping of code banks, causing read disturbance and affecting data quality due to the need to repeatedly read specific blocks storing divided ISP codes.
Innovation Solution
The implementation of a flash memory controller that accesses a flash memory module with multiple planes and blocks, allowing code banks to be stored in a super block comprising blocks from multiple planes, reducing the need for frequent reads from a specific block by using multi-plane-read operations for code bank swapping.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the ISP code is divided into several code banks and stored in a specific block, then the buffer capacity limitation is addressed, but the specific block is read many times causing read disturbance and affecting data quality
Solution Approach 1:
The flash memory module is divided into multiple planes, with each plane containing multiple blocks. Code banks are distributed across different planes rather than concentrated in a single specific block, thereby segmenting the read operations across multiple locations and reducing read disturbance to any single block.
Solution Approach 2:
The patent introduces a multi-plane architecture as an additional dimension for storing code banks. Instead of using a single-block structure, code banks are distributed across multiple planes, transforming the storage architecture from one-dimensional to multi-dimensional, which reduces read disturbance by spreading access patterns across different physical locations.
2Adaptability or versatility
If code banks are swapped frequently due to limited buffer capacity, then different functions can be loaded, but the swapping operation slows down system performance
Solution Approach 1:
Multiple code banks are pre-loaded into the buffer memory simultaneously during initialization, rather than loading them one at a time during operation. This preliminary action ensures that multiple code banks are already available in the buffer, eliminating the need for frequent swapping operations and improving system responsiveness.
Solution Approach 2:
The patent merges multiple code banks into the buffer memory at the same time, combining multiple loading operations into a single unified loading process. This allows the system to have multiple code banks available concurrently in the buffer, reducing the frequency of swapping operations and improving overall system productivity.
Data Source
AI summary
The present invention provides a control method of a flash memory controller, wherein the flash memory controller is configured to access a flash memory module, the flash memory module includes a plurality of planes, and each plane includes a plurality of blocks; and the control method includes the steps of: after the flash memory controller is powered on, reading a first code bank from a specific block of the plurality of blocks; storing the first code bank into a buffer memory; executing the first code bank to manage the flash memory module; when the flash memory controller starts a code bank swapping operation, trying to read a second code bank from a super block; if the second code bank is read successfully, storing the second code bank into the buffer memory to replace the first code bank; and executing the second code bank to manage the flash memory module.