Flash Controller Trimming Tag Cache for Mapping Table Updates

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Solution Overview

Problem

Current data storage devices face inefficiencies in managing large flash memory systems due to the time-consuming process of downloading, modifying, and sealing sub-tables during space trimming operations, which affects performance and resource usage.

Innovation Solution

A data storage device architecture that includes a controller which programs a trimming tag into a cache area and flushes it into non-volatile memory, allowing for partial updates of the host-to-device mapping table in the background after a trimming command, reducing the need for immediate and extensive table updates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the controller downloads, modifies, and seals sub-tables during space trimming operations, then the host-to-device mapping table is updated accurately, but the time consumption increases and performance deteriorates

Engineering Contradiction:
Improvemapping table update accuracyVSAvoidspace trimming operation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent divides the host-to-device mapping table into multiple sub-tables, each managing a specific range of logical addresses. During space trimming operations, only the affected sub-table is modified rather than the entire mapping table, significantly reducing the time required for updates while maintaining accuracy through targeted modifications of relevant segments

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a trimming bitmap that is updated before the actual space trimming operation. This bitmap records the trimming ranges in advance, allowing the controller to identify and modify only the necessary sub-tables during the trimming operation, thereby reducing time consumption while ensuring accurate mapping table updates

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the controller updates the host-to-device mapping table immediately during trimming, then data integrity is maintained, but resource usage and processing load increase

Engineering Contradiction:
Improvedata integrityVSAvoidprocessing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

By segmenting the mapping table into sub-tables, the patent enables selective updates of only the affected segments during trimming operations. This segmented approach maintains data integrity for trimmed regions while avoiding the need to process the entire mapping table, thereby improving overall processing efficiency

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent allows the controller to continue processing other commands while background updates of the trimming bitmap and affected sub-tables are performed. This continuous operation mode maintains data integrity through eventual consistency while improving productivity by avoiding idle waiting time for complete table updates

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS11307979B2Data storage device and non-volatile memory control method
Publication Date: 2022.04.19 SILICON MOTION INC
  • US11307979B2 patent drawing
  • US11307979B2 patent drawing
  • US11307979B2 patent drawing

AI summary

Efficient space trimming of data storage device is shown, which uses a controller to program a trimming tag that corresponds to a trimming command issued by a host into a cache area of a temporary storage device. The trimming tag, therefore, can be flushed from the cache area to the non-volatile memory for non-volatile storage. The update of the host-to-device mapping table based on the trimming tag can be postponed to the moment that the controller is free.