Flash Memory Controller Zone Buffer Alternation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The limited capacity of dynamic random access memory (DRAM) in storage devices restricts the number of zones that can be opened for data writing, limiting the performance enhancement of storage devices like solid-state drives (SSDs) in NVMe specifications.

Innovation Solution

A flash memory controller method that configures a flash memory module into a zoned namespace with multiple zones of equal size, using a microprocessor to alternate data storage between two buffers within each zone buffer, optimizing memory space allocation and efficient data writing to the flash memory module.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If dedicated memory spaces are allocated for each opened zone in DRAM, then data writing performance is improved, but the number of zones that can be opened is limited due to DRAM capacity

Engineering Contradiction:
Improvedata writing performanceVSAvoidnumber of opened zones
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent segments the memory management into multiple levels: the flash memory module is divided into multiple zones, each zone is assigned a zone buffer in DRAM, and each zone buffer contains multiple page buffers. This hierarchical segmentation allows efficient management of limited DRAM resources while supporting multiple concurrent zone operations, thereby resolving the contradiction between maintaining write performance and increasing the number of opened zones.

Inventive Principle:
Principle #1Segmentation

2Productivity

If more zones are opened for data writing, then storage device performance is enhanced, but DRAM capacity is exceeded

Engineering Contradiction:
Improvestorage device performanceVSAvoidDRAM capacity
Core Design Contradiction:
ProductivityVSVolume of stationary object

Solution Approach 1:

The patent implements dynamic memory allocation where zone buffers and page buffers are allocated and deallocated based on the actual number of opened zones. When zones are closed, their associated memory spaces are freed for other uses. This dynamic adjustment allows the system to maximize the number of concurrently opened zones without permanently exceeding DRAM capacity, thereby enhancing storage device performance within available memory constraints.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the parameter of memory allocation from static (fixed dedicated spaces) to dynamic (flexible allocation based on opened zones). The controller adjusts the number and size of active zone buffers according to the current operational state, allowing the same DRAM capacity to support varying numbers of opened zones based on performance requirements and workload conditions.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If dedicated memory spaces are allocated for each zone, then data writing efficiency is improved, but memory space utilization becomes inefficient

Engineering Contradiction:
Improvedata writing efficiencyVSAvoidmemory space utilization efficiency
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent implements a mechanism where memory spaces associated with closed zones are discarded (deallocated) and recovered (made available for reuse). When a zone is closed, its zone buffer and page buffers are released back to the memory pool, preventing wasted memory allocation. This ensures that dedicated memory spaces are only allocated when needed for active zones, maintaining writing efficiency for opened zones while optimizing overall memory utilization.

Inventive Principle:
Principle #34Discarding and recovering

Data Source

PatentUS12158841B2Control method of flash memory controller and associated flash memory controller and storage device
Publication Date: 2024.12.03 SILICON MOTION INC
  • US12158841B2 patent drawing
  • US12158841B2 patent drawing
  • US12158841B2 patent drawing

AI summary

The present invention provides a control method of a flash memory controller is disclosed, wherein the flash memory controller is configured to access a flash memory module, and the control method comprising: allocating a memory space within a memory for storing data from the host device; dividing the memory space into a plurality of zone buffers, wherein each of the zone buffers is used to store data corresponding to one zone having an opened state; and for a first zone buffer of the plurality of zone buffers, controlling a first buffer and a second buffer within the first zone buffer to alternately store data of a first zone from the host device and write the data of the first zone to a zoned namespace of the flash memory module.