Flash Memory Decoding with Adaptive Read-Level Voltage Selection

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Solution Overview

Problem

Flash memory introduces data errors due to manufacturing variations and aging, which existing error correcting codes like LDPC codes attempt to address but at the cost of adding latency to read operations.

Innovation Solution

A method that selects a preliminary read-level voltage based on a decoding success indicator for a preliminary hard decoding operation, and if unsuccessful, executes a multi-stage decoding operation using a sequence of read-level voltages, allowing for efficient error recovery without progressing through all stages if previous decoding was successful.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If LDPC codes are used for error correction, then error correcting capability is improved, but read operation latency increases

Engineering Contradiction:
Improveerror correcting capabilityVSAvoidread operation latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs a preliminary hard decoding operation using a selected read-level voltage before executing the full multi-stage decoding operation. This preliminary action allows the system to identify and correct errors that can be resolved with a single voltage level, avoiding the need to proceed through all stages of the more time-consuming multi-stage decoding process, thus reducing overall latency while maintaining error correction capability

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent segments the decoding operation into distinct stages: a preliminary hard decoding stage using a selected read-level voltage, and a multi-stage decoding operation using a sequence of read-level voltages. This segmentation allows the system to attempt error correction in a faster preliminary stage first, and only proceed to the more comprehensive multi-stage decoding if necessary, thereby balancing error correction effectiveness with latency reduction

Inventive Principle:
Principle #1Segmentation

2Reliability

If multi-stage decoding operation is executed completely, then error recovery efficiency is improved, but latency increases due to unnecessary stages

Engineering Contradiction:
Improveerror recovery efficiencyVSAvoidlatency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies partial action by executing only the necessary portion of the multi-stage decoding operation. Instead of always completing all decoding stages, the system performs a preliminary hard decoding with a selected voltage first, and only proceeds with additional stages if errors persist. This partial execution approach maintains error recovery efficiency for cases that require it while avoiding the latency penalty of unnecessary decoding stages when errors can be corrected with minimal intervention

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11531587B2Dynamic multi-stage decoding
Publication Date: 2022.12.20 SANDISK TECHNOLOGIES LLC
  • US11531587B2 patent drawing
  • US11531587B2 patent drawing
  • US11531587B2 patent drawing

AI summary

Methods and systems for decoding raw data may select a preliminary read-level voltage from a sequence of read-level voltages based on a decoding success indicator and execute a preliminary hard decoding operation to decode raw data read from a plurality of memory cells using the preliminary read-level voltage. If the preliminary hard decoding operation is successful, the decoded data from the hard decoding operation is returned. If the preliminary hard decoding operation is unsuccessful, a multi-stage decoding operation may be executed to decode raw data read from the plurality of memory cells using the sequence of read-level voltages, and returning decoded data from the multi-stage decoding operation upon completion of the multi-stage decoding operation. The decoding success indicator is maintained based on results of the preliminary hard decoding operation or the multi-stage decoding operation.