Multi-Chip Flash DIMM Height Reduction via ASIC Integration
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Solution Overview
Problem
Designing pluggable memory modules with appropriate electrical characteristics and form factors is challenging due to space limitations, particularly height constraints, and existing solutions often require power supply conversion and regulation circuits that increase the module's height, making them incompatible with certain computing systems.
Innovation Solution
The integration of multi-chip packaged flash memory and support ASICs reduces the module's height by eliminating power supply conversion circuits and packaging multiple flash memory die into a single package, along with integrating address and data support ASICs to minimize the number of PCB traces and components, allowing the module to operate with the external power supply voltage, thus reducing the overall height and increasing memory capacity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If power supply conversion and regulation circuits are integrated into the memory module, then the module can operate with different power supply voltages, but the module's height increases making it incompatible with certain computing systems
Solution Approach 1:
The patent extracts and removes the power supply conversion and regulation circuits from the memory module design. By eliminating these circuits, the module height is reduced to meet form factor requirements while the module operates directly with the external power supply voltage without voltage conversion capability
Solution Approach 2:
The patent changes the operating voltage parameter of the flash memory integrated circuits to match the external power supply voltage. This parameter change eliminates the need for voltage conversion circuits, thereby reducing module height while maintaining voltage compatibility
2Quantity of substance
If multiple flash memory die are packaged into a single package, then memory capacity increases and manufacturing costs are reduced, but the electrical characteristics and form factor design become more challenging
Solution Approach 1:
The patent merges multiple flash memory die into a single integrated package. This consolidation increases memory capacity and reduces the number of separate components, thereby simplifying the overall electrical design and form factor considerations compared to handling multiple separate chips
Solution Approach 2:
The integrated package design provides a universal form factor that can be implemented in standard memory module configurations. The multi-chip package serves multiple functions including increased capacity, reduced component count, and standardized electrical interfaces
Data Source
AI summary
In one implementation, flash memory chips are provided with an operating power supply voltage to substantially match a power supply voltage expected at an edge connector of a dual inline memory module. The one or more of the flash memory chips and a memory support application integrated circuit (ASIC) may be mounted together into a multi-chip package for integrated circuits. The one or more flash memory chips and the memory support ASIC may be electrically coupled together by routing one or more conductors between each in the multi-chip package. The multi-chip package may be mounted onto a printed circuit board (PCB) of a flash memory DIMM to reduce the number of packages mounted thereto and reduce the height of the flash memory DIMM. The number of printed circuit board layers may also be reduced, such as by integrating address functions into the memory support ASIC.