Flash Memory Disturb-Strength Matrix for Charge Error Prediction
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Solution Overview
Problem
Flash memory devices face degradation due to charge disturbances during program/erase cycles, leading to errors such as 'read disturb' and 'program disturb,' which existing error detection and correction techniques struggle to address efficiently without impacting readout performance.
Innovation Solution
A disturb-strength matrix is used to estimate the relative strength of charge-disturbing operations, determining when prophylactic actions are necessary by tracking the history of charge-disturbing operations and measuring time-to-completion dispersion in Flash memory cells, allowing for real-time error correction during read operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional error detection and correction techniques are used, then data errors can be detected and corrected, but readout performance is significantly impacted
Solution Approach 1:
The patent applies preliminary action by performing prophylactic refresh operations on Flash memory cells before actual errors occur. The system monitors charge disturbance probabilities and triggers refresh operations when disturbance levels exceed thresholds, preventing errors rather than detecting and correcting them after occurrence. This proactive approach maintains data integrity while minimizing impact on readout performance.
Solution Approach 2:
The patent implements feedback mechanisms by continuously monitoring charge disturbance probabilities and using this information to dynamically adjust refresh operations. The system calculates disturbance probabilities based on operation histories and uses this feedback to determine when and where to perform refresh operations, creating a closed-loop system that optimizes both reliability and performance.
2Reliability
If prophylactic refresh operations are performed frequently, then data errors are prevented, but device complexity and operation overhead increase
Solution Approach 1:
The patent uses parameter changes by dynamically adjusting refresh operation parameters based on calculated charge disturbance probabilities. Instead of using fixed refresh schedules, the system modifies refresh frequency, timing, and target cells based on real-time probability assessments derived from operation histories and disturbance models, thereby optimizing reliability while managing complexity.
Solution Approach 2:
The patent applies partial action by performing refresh operations only on specific cells or blocks that exhibit high charge disturbance probabilities, rather than refreshing the entire memory device. This selective approach prevents errors in high-risk areas while avoiding unnecessary operations on low-risk cells, reducing overall operation overhead and complexity.
3Measurement precision
If operation history is tracked in detail, then charge disturbance probabilities are accurately calculated, but memory resources are consumed
Solution Approach 1:
The patent extracts only the essential information needed for disturbance probability calculation from the operation history, rather than storing complete detailed logs. The system identifies and retains key parameters such as operation types, frequencies, and patterns that most significantly impact charge disturbances, discarding redundant information to minimize memory resource consumption while maintaining calculation accuracy.
Solution Approach 2:
The patent segments the operation history into distinct categories or time periods, managing memory resources by storing different levels of detail for different segments. For example, recent operations may be tracked in greater detail while older operations are summarized or aggregated, allowing accurate probability calculations for current conditions while conserving memory resources for historical data.
Data Source
AI summary
A Flash memory system and a method for data management using the system's sensitivity to charge-disturbing operations and the history of charge-disturbing operations executed by the system are described. In an embodiment of the invention, the sensitivity to charge-disturbing operations is embodied in a disturb-strength matrix in which selected operations have an associated numerical value that is an estimate of the relative strength of that operation to cause disturbances in charge that result in data errors. The disturb-strength matrix can also include the direction of the error which indicates either a gain or loss of charge. The disturb-strength matrix can be determined by the device conducting a self-test in which charge-disturb errors are provoked by executing a selected operation until a detectable error occurs. In alternative embodiments the disturb-strength matrix is determined by testing selected units from a homogeneous population.