Flash Drive Wear-Leveling Table for Memory Block Allocation
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Solution Overview
Problem
Existing flash memory systems face inefficiencies in wear leveling, leading to uneven distribution of write operations across memory blocks, which reduces the lifespan of flash memory due to the inefficiency of linear searches in logical-to-physical tables, especially when dealing with a large number of memory blocks and a limited number of erased or faulty blocks.
Innovation Solution
Implementing a wear-leveling table with prioritization that populates pointers to unallocated memory blocks, allowing the flash memory controller to quickly identify erased or erasable blocks for writing, thereby reducing search time and more evenly distributing write operations across memory blocks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If linear search of logical-to-physical table is used to find erased memory blocks, then wear-leveling is improved by distributing write operations, but search time and processing efficiency deteriorate significantly
Solution Approach 1:
The patent applies preliminary action by pre-organizing memory block information into a wear-leveling table that maintains pointers to erased blocks in wear-order. This pre-arranged structure eliminates the need for linear searching during write operations, as the flash driver can directly access the next erased block pointer from the wear-leveling table, thus resolving the contradiction between wear-leveling effectiveness and search time efficiency
Solution Approach 2:
The wear-leveling table serves as an intermediary data structure between the logical-to-physical table and the flash driver. It mediates the wear-leveling process by maintaining a sorted list of erased block pointers in wear-order, allowing the flash driver to efficiently access the next target block without performing linear searches on the complete logical-to-physical table, thus balancing wear-distribution with search efficiency
2Productivity
If linear search is performed on logical-to-physical table with many memory blocks, then all blocks can be searched for erased blocks, but the number of accesses increases making the process impossible under processing requirements
Solution Approach 1:
The patent applies segmentation by dividing the memory management task into two parts: the logical-to-physical table maintains complete block information for mapping, while the wear-leveling table maintains only the sorted pointers to erased blocks in wear-order. This segmentation allows the flash driver to work with the smaller, pre-processed wear-leveling table for write operations, reducing processing complexity while maintaining productivity
Solution Approach 2:
The wear-leveling table performs preliminary sorting of erased block pointers in wear-order during memory initialization or block erasure events. This pre-arranged ordering eliminates the need for complex linear searching and sorting operations during write operations, reducing processing complexity while maintaining high write throughput
Data Source
AI summary
A system and method comprising a non-volatile memory including one or more memory blocks to store data, a controller to allocate one or more of the memory blocks to store data, and a wear-leveling table populated with pointers to unallocated memory blocks in the non-volatile memory, the controller to identify one or more pointers in the wear-leveling table and to allocate the unallocated memory blocks associated with the identified pointers for the storage of data.


