Flash Memory Encoder Using Divided Parity Blocks for Low-Hardware Convolution
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The complexity of matrix multiplication operations in encoders for flash memory controllers, particularly circulant convolution calculations, leads to increased hardware costs and complexity, especially when the parity-check generation matrix is not easily found.
Innovation Solution
The encoder design includes a first barrel shifter module, a first computing circuit, an adjusting circuit, a first circulant convolution computing circuit, and a second computing circuit, which process data blocks to generate partial parity blocks, perform circulant convolution operations, and adjust results to minimize hardware requirements for generating parity blocks, reducing the need for multiple matrix multiplications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the encoder performs multiple matrix multiplication operations and compensation operations to generate parity-check code, then the encoding capability is maintained, but the hardware cost and complexity increase
Solution Approach 1:
The patent segments the parity-check generation process into two distinct parts: a first portion generated through matrix multiplication operations and a second portion generated through compensation operations. By dividing the generation matrix into corresponding first and second portions, the encoder can process these segments separately and combine them, thereby reducing the overall hardware complexity while maintaining encoding capability.
2Productivity
If the encoder uses a parity-check generation matrix to generate parity-check code directly, then the encoding efficiency is high, but the matrix might not be found under some circumstances
Solution Approach 1:
The patent prepares both a parity-check generation matrix and a compensation matrix in advance. When the parity-check generation matrix is available, the encoder uses it for efficient encoding. When it is not available, the pre-prepared compensation matrix can be used to generate the necessary compensation operations, ensuring the encoder remains adaptable to different circumstances.
3Manufacturing precision
If the encoder performs circulant convolution calculations for matrix multiplication, then the parity-check code generation is accurate, but the hardware cost increases
Solution Approach 1:
The patent segments the circulant convolution calculations into two separate parts corresponding to the first portion and second portion of the generation matrix. The first circulant convolution computing circuit handles the first portion while the second handles the second portion. This segmentation allows for more efficient hardware implementation and reduces overall hardware cost while maintaining calculation accuracy.
Data Source
AI summary
An encoding method includes: processing a plurality of data blocks to generate a plurality of partial parity blocks, wherein the partial parity blocks includes a first portion and a second portion; using a first computing circuit to generate a first calculating result according to the second portion of the partial parity blocks; using the first calculating result to adjust the first portion of the partial parity blocks; performing circulant convolution operations upon the adjusted first portion to generate a first portion of parity blocks; and using a second computing circuit to generate a second portion of the parity blocks according to at least the first portion of parity blocks; wherein the first portion of the parity blocks and the second portion of the parity blocks serve as a plurality of parity blocks generated in response to encoding the data blocks.