Flash Memory Erased Page Detection with Dual-Decoder Verification

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Solution Overview

Problem

Flash memory systems face challenges in identifying and managing erased pages within blocks, particularly due to low host writing activity or power cycles, which can leave some pages in an unprogrammed state, necessitating a robust method to determine the last programmed page.

Innovation Solution

A method involving a dual-decoder system where a first decoder identifies successfully decoded codewords and a second decoder verifies the data, with all ones indicating an erased state and mixed patterns indicating a programmed state, allowing for efficient scanning of flash memory blocks to determine available pages for writing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single decoder is used to read codewords from flash memory pages, then the device complexity is reduced, but the accuracy in identifying erased pages deteriorates

Engineering Contradiction:
Improvedecoder structureVSAvoiderased page identification accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The single decoder function is segmented into two specialized decoders: a first decoder that attempts to decode codewords and provides a success indicator, and a second decoder that verifies decoded data. This segmentation allows each decoder to be optimized for its specific function, improving overall identification accuracy while maintaining manageable complexity through functional specialization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A success indicator mechanism is introduced as an intermediary between the first decoder and the second decoder. This intermediary provides critical information about decode success, enabling the system to selectively verify only those pages that appear successfully decoded, thereby improving accuracy without proportionally increasing complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If all pages in a flash memory block are programmed, then the storage capacity is fully utilized, but the ability to quickly identify available erased pages deteriorates

Engineering Contradiction:
Improvedata storage capacityVSAvoidtime to identify erased pages
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The system performs preliminary decoding attempts on all pages before final verification. By quickly identifying pages that fail the first decoding attempt, the system can immediately mark them as potentially erased without requiring full verification, thus reducing the time to identify available pages while maintaining full storage capacity utilization.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system applies partial verification action by using two-stage decoding: a quick first decode followed by selective second decode only for pages that appear successful. This partial action approach avoids the time cost of verifying every page while still accurately identifying erased pages, balancing storage utilization with identification speed.

Inventive Principle:
Principle #16Partial or excessive action

3Measurement precision

If a dual decoder verification system is implemented, then the accuracy of erased page identification is improved, but the device complexity increases

Engineering Contradiction:
Improveerased page identification accuracyVSAvoiddecoder system structure
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The verification system is segmented into two distinct decoder stages with clearly defined roles. The first decoder handles initial decoding and provides success indicators, while the second decoder handles verification only for successful cases. This segmentation improves accuracy by separating concerns while keeping each individual decoder component relatively simple.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The dual decoder system is applied partially rather than universally - the second decoder is activated only when the first decoder succeeds. This selective application reduces the overall complexity burden compared to running both decoders on all pages, while still achieving high accuracy through targeted verification of promising candidates.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS10884854B2Method and system for identifying erased memory areas
Publication Date: 2021.01.05 SANDISK TECHNOLOGIES LLC
  • US10884854B2 patent drawing
  • US10884854B2 patent drawing
  • US10884854B2 patent drawing

AI summary

The subject technology provides for scanning blocks of a flash memory device for erased pages. A first codeword read from a page of a block in a flash memory device is received and provided to a first decoder for decoding. In response to receiving a first success indicator from the first decoder indicating that the first codeword was successfully decoded, first decoded data is provided from the first decoder to a second decoder for verification of the first decoded data. In response to receiving a first failure indicator from the second decoder indicating that the first decoded data was not verified, the page of the block is identified as being in an erased state based on the first success indicator received from the first decoder and the first failure indicator received from the second decoder.