Flash Memory Feature Signaling With Check Bits for Error Detection
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Solution Overview
Problem
Conventional flash memory controllers experience errors due to poor signal quality during set-feature and get-feature operations when the transmission mode does not change as intended, leading to inconsistent configurations between the controller and the memory device.
Innovation Solution
A flash memory controller with an input/output circuit and processor that generates a set-feature signal with check bits to detect errors in parameter data, and polls a status register to determine operation success, while the memory device checks and updates a detection result bit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error correction protection operations are performed to generate check bits for detecting errors in parameter data, then reliability of flash memory operations is improved, but device complexity increases due to additional processing steps
Solution Approach 1:
The flash memory controller performs error correction protection operations in advance to generate check bits before transmitting parameter data to the flash memory device. This preliminary action allows the receiving end to detect errors without requiring complex real-time processing during data transmission, thus improving reliability while managing device complexity.
Solution Approach 2:
Check bits serve as an intermediary element between the flash memory controller and the flash memory device. These check bits carry error detection information without requiring complex communication protocols or additional processing logic in either device, simplifying the overall system while enhancing operational reliability.
2Measurement precision
If the flash memory device polls the status register to obtain detection result bits, then measurement precision of operation status is improved, but loss of time increases due to additional polling operations
Solution Approach 1:
The flash memory device autonomously performs error detection on received parameter data by using check bits to generate detection result bits, which are then stored in its own status register. This self-service approach eliminates the need for the flash memory controller to perform complex verification operations, reducing time loss while maintaining high measurement precision through the device's internal polling mechanism.
Data Source
AI summary
A method of flash memory controller includes: activating configuration of feature address of set-feature operation for a flash memory device; performing specific error correction protection operation upon multiple bits of parameter data corresponding to the set-feature operation to generate at least one check bit; generating and transmitting set-feature signal to the flash memory device to make the flash memory device determine whether errors occur in the parameter data or not based on the at least one check bit, the set-feature signal sequentially including a set-feature command, the feature address, the multiple bits of the parameter data, and the at least one check bit, the parameter data and the at least one check bit forming multiple bytes following the feature address; and, polling a status register of the flash memory device to get a result bit from the status register to know whether an error occurs in the transmitted set-feature signal.