Flash Device Floating Gate Residue Isolation

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Solution Overview

Problem

The manufacturing process of flash devices faces challenges in completely removing polysilicon residues at the bottom of floating gates, which affects data-erasing and data-writing performance due to the non-selective deposition of polysilicon and the limitations of etching processes, leading to degraded device performance and potential damage to the active region.

Innovation Solution

A method involving the formation of a non-conductive layer on the tunneling oxide layer, extending onto the side wall of the floating gate polycrystalline layer, which isolates the polysilicon residue and allows for the formation of a control gate without the need for extensive etching, thereby preventing residue-induced performance degradation and simplifying the manufacturing process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the etching process is extended to remove polysilicon residues at the bottom of floating gates, then the polysilicon residue is reduced, but the active region is damaged and fractures occur

Engineering Contradiction:
Improvepolysilicon residue removalVSAvoidactive region integrity
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

A non-conductive layer is formed on the tunneling oxide layer before polysilicon deposition, extending onto the side wall of the floating gate polycrystalline layer. This preliminary action creates a barrier that prevents polysilicon from depositing at the bottom of the floating gate, eliminating the need for extended etching that would damage the active region.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The non-conductive layer acts as an intermediary between the tunneling oxide layer and the polysilicon layer. It provides a selective barrier that allows polysilicon to be deposited on the tunneling oxide layer while preventing polysilicon accumulation at the bottom of the floating gate, thus solving the residue problem without requiring aggressive etching.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If the etching time is increased to remove polysilicon residues, then the polysilicon residue is reduced, but the contours of polysilicon structures are damaged

Engineering Contradiction:
Improvepolysilicon residue removalVSAvoidpolysilicon structure contour
Core Design Contradiction:
Manufacturing precisionVSShape

Solution Approach 1:

The non-conductive layer is formed in advance on the tunneling oxide layer and extends onto its side wall before polysilicon deposition. This preliminary structure prevents polysilicon from reaching the bottom of the floating gate during deposition, eliminating the need for prolonged etching that would compromise the contours of polysilicon structures.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The non-conductive layer provides localized selectivity: it allows polysilicon deposition on the tunneling oxide layer surface while blocking polysilicon accumulation at specific locations (bottom of floating gate). This local quality control enables short etching times that preserve polysilicon structure contours.

Inventive Principle:
Principle #3Local quality

3Manufacturing precision

If conventional etching methods are used to remove polysilicon residues, then some residues are removed, but complete cleanup is difficult and time-consuming

Engineering Contradiction:
Improvepolysilicon residue removalVSAvoidetching time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The non-conductive layer is formed on the tunneling oxide layer and extends onto its side wall before polysilicon deposition. This preliminary barrier prevents polysilicon from depositing at the bottom of the floating gate in the first place, eliminating the need for time-consuming extended etching processes to achieve complete residue removal.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The non-conductive layer, which might seem to add complexity, actually converts the harmful non-selective deposition of polysilicon into a beneficial selective deposition process. By providing a built-in barrier, it prevents residue formation at critical locations, making the overall process more efficient and reducing etching time.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The non-conductive layer effectively isolates polysilicon residues, enhancing the data-erasing and data-writing performance of the flash device while reducing manufacturing time and costs, and maintaining the integrity of the active region and polysilicon structures.

Implementation Method 1

a non-conductive layer located on the tunneling oxide layer in the first substrate region and extending onto the tunneling oxide layer located at a side wall of the floating gate polycrystalline layer

Methodology Applied
Scientific EffectElectrical insulation: Electrical Resistance

Data Source

PatentUS11605641B2Flash device and manufacturing method thereof
Publication Date: 2023.03.14 CSMC TECH FAB2 CO LTD
  • US11605641B2 patent drawing
  • US11605641B2 patent drawing
  • US11605641B2 patent drawing

AI summary

A flash device and a manufacturing method thereof. The method comprises: providing a substrate, and forming, on the substrate, a floating gate polycrystalline layer, a floating gate oxide layer, and a tunneling oxide layer; wherein the floating gate polycrystalline layer is formed on the substrate, the floating gate oxide layer is formed between the substrate and the floating gate polycrystalline layer, a substrate region at one side of the floating gate polycrystalline layer is a first substrate region, a substrate region at the other side of the floating gate polycrystalline layer is a second substrate region; forming, on the tunneling oxide layer, located in the first substrate region, a continuous non-conductive layer, the non-conductive layer extending to the tunneling oxide layer at a side wall of the floating gate polycrystalline layer; and forming, on the tunneling oxide layer, a polysilicon layer.