Flash FPGA Configuration Digest Verification Against Tampering
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Solution Overview
Problem
Flash FPGAs are perceived as unreliable for safety-critical applications due to susceptibilities leading to uncertain data storage and potential tampering, limiting their use in critical systems such as fuze applications in munitions and medical devices.
Innovation Solution
A programmable logic device with a safety verification mechanism that computes a digest value based on configuration data stored in non-volatile memory, performs an integrity check, and provides a check value for external validation to ensure proper configuration and prevent unauthorized modifications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If flash FPGAs are used for their flexibility and reprogrammability, then adaptability is improved, but reliability deteriorates due to data storage uncertainties and tampering susceptibilities
Solution Approach 1:
The patent applies preliminary action by computing a digest value from the configuration data and storing it in non-volatile memory before the FPGA operates. This pre-computed digest serves as a reference for future integrity checks, allowing the system to verify configuration data without re-computing from scratch each time.
Solution Approach 2:
The patent implements feedback through an integrity check mechanism that continuously verifies the configuration data against the stored digest value. The system reads the configuration data, computes its current digest, compares it with the stored digest, and generates a verification result that feeds back to determine whether to proceed with operation or trigger error handling.
2Reliability
If integrity verification mechanisms are added to flash FPGAs, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent extracts the integrity verification function as a separate, dedicated mechanism within the FPGA architecture. Rather than distributing verification logic throughout the entire device, the system isolates the digest computation and comparison operations in specific verification circuits, making the complexity localized and manageable while maintaining overall system reliability.
Solution Approach 2:
The patent uses an intermediary approach by introducing a digest value as a intermediate representation of the configuration data. Instead of directly comparing entire configuration datasets, the system computes a condensed digest value that serves as a mediator for verification, significantly reducing the complexity of the comparison operation while maintaining verification integrity.
3Measurement precision
If digest computation and integrity checks are performed, then measurement precision of configuration validity is improved, but loss of time increases due to additional verification steps
Solution Approach 1:
The patent applies parameter changes by transforming the configuration data into a digest value with different parameters (condensed representation). This transformation changes the data from a large, complex configuration set into a smaller, computable digest that can be quickly compared, maintaining verification accuracy while reducing processing time for subsequent checks.
Solution Approach 2:
The patent performs the computationally intensive digest computation as a preliminary action during configuration loading or programming phases. By completing this time-consuming operation before operation begins, the system establishes a baseline digest for quick comparison during runtime verification, minimizing the time loss during actual operation while maintaining high verification precision.
Data Source
AI summary
An apparatus comprises a programmable logic device including programmable logic elements. The programmable logic elements are configurable to implement functions according to configuration data stored in non-volatile memory cells of the programmable logic elements. The programmable logic device to store a digest value in memory, the digest value at least partially based on the configuration data stored in the non-volatile memory cells. The programmable logic service is also to perform an integrity check to verify whether a currently computed digest value matches the digest value, the currently computed digest value at least partially based on current configuration data stored in the non-volatile memory cells; read the digest value; determine a check value at least partially based on the digest value; and provide the check value at an output of the programmable logic device. The check value may be provided at the output for verification at a verification circuit.