Flash FPGA Self-Reprogramming Without Bitstream Exposure

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Solution Overview

Problem

Flash-based FPGA devices require external reprogramming methods that are logistically difficult, expensive, and compromise security due to exposure of the bit stream, as existing methods necessitate external control, storage, and system intelligence for refreshing and updating the device.

Innovation Solution

A flash-based programmable integrated circuit with on-chip intelligence that allows self-programming from an external data source, eliminating the need for external control, storage, and bit stream exposure, using a microcontroller or state machine to program and refresh the flash memory array.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If external reprogramming methods are used for flash-based FPGA devices, then the device can be reprogrammed in the field, but the process becomes logistically difficult and expensive requiring external control and storage

Engineering Contradiction:
Improvefield reprogramming capabilityVSAvoidexternal control requirements
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements self-service by integrating a controller and programming circuitry directly within the FPGA device. The controller manages the programming process autonomously, reading configuration data from an external source and programming the flash memory cells without requiring external control logic or storage systems. This eliminates the need for external intelligence while maintaining field reprogramming capability.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent merges the controller, programming circuitry, and flash memory interface into a single integrated device. The controller is coupled to the programming circuitry which is in turn coupled to the flash memory array, creating a unified system that performs both logic functions and configuration storage within one package, eliminating the need for separate external control and storage components.

Inventive Principle:
Principle #5Merging (Combining)

2Adaptability or versatility

If the program is stored in external memory and used to reprogram the device, then reprogramming is possible, but the bit stream must be exposed which compromises security

Engineering Contradiction:
Improvereprogramming capabilityVSAvoidsecurity compromise
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The patent extracts the configuration data from external storage and processes it entirely within the device boundaries. The controller reads the bit stream from an external source, immediately programs it into the flash memory array through the programming circuitry, and never stores it externally. This extraction approach eliminates security exposure while maintaining reprogramming capability.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The controller acts as an intermediary between the external data source and the flash memory array. It receives the bit stream externally, processes and validates it, then transfers it through the programming circuitry to the flash memory. This intermediary role ensures the bit stream never resides in external storage, preventing security compromise while enabling reprogramming.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Duration of action of stationary object

If flash memory is used for configuration storage, then non-volatile storage is achieved, but voltage degradation over time requires periodic refreshing

Engineering Contradiction:
Improvenon-volatile storageVSAvoidvoltage stability
Core Design Contradiction:
Duration of action of stationary objectVSReliability

Solution Approach 1:

The patent implements feedback by having the controller periodically monitor the voltage levels of the flash memory cells and automatically initiate refresh operations when degradation is detected. The controller reads the configuration data, verifies its integrity, and reprograms the flash memory array as needed, creating a closed-loop system that maintains voltage stability without external intervention.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent applies preliminary action by proactively refreshing the flash memory before complete voltage degradation occurs. The controller is configured to periodically read and verify the configuration data, and reprogram the flash memory array preemptively to prevent functional failures, rather than waiting for actual data loss to occur.

Inventive Principle:
Principle #10Preliminary action

4Extent of automation

If on-chip intelligence is added for self-programming, then external control is eliminated, but the device complexity increases

Engineering Contradiction:
Improveself-programming capabilityVSAvoidon-chip components
Core Design Contradiction:
Extent of automationVSDevice complexity

Solution Approach 1:

The patent applies universality by designing the controller to perform multiple functions: it manages normal device operation, handles field reprogramming, monitors flash memory voltage levels, and executes refresh operations. This multi-functional controller consolidates what could be separate complex subsystems into a single integrated component, reducing overall device complexity while achieving self-programming capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent implements dynamics by making the controller's functionality adaptive rather than static. The controller can dynamically switch between different operational modes including normal device control, programming mode for field reconfiguration, and refresh mode for voltage maintenance. This dynamic behavior allows a single controller structure to handle diverse tasks without requiring separate dedicated hardware for each function.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS7885122B2Flash-based FPGA with secure reprogramming
Publication Date: 2011.02.08 MICROSEMI SOC CORP
  • US7885122B2 patent drawing
  • US7885122B2 patent drawing
  • US7885122B2 patent drawing

AI summary

A flash-based programmable integrated circuit includes programmable circuitry, a flash memory array coupled to the programmable circuitry for configuring it, flash programming circuitry for programming the flash memory array, and an on-chip intelligence, such as a microcontroller or state machine, coupled to the programming circuitry to program the flash memory from off-chip data supplied via an I/O pad, or to refresh the data stored in the flash memory to prevent it from degrading.