Flash Interface Circuit Managing Multiple Memory Devices

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Solution Overview

Problem

Flash memory devices face limitations in capacity, performance, and flexibility due to process technology, die size, and production cost, making it challenging to meet increasing demands for higher capacity and lower costs while maintaining reliability.

Innovation Solution

The implementation of a flash interface circuit that manages multiple flash memory devices, providing virtual flash memory devices with enhanced attributes such as increased storage capacity, improved error correction, garbage collection, wear leveling, and compatibility with different vendor protocols, thereby increasing performance and flexibility while reducing costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multiple flash memory devices are managed through a flash interface circuit, then storage capacity and performance are improved, but device complexity increases

Engineering Contradiction:
Improvestorage capacityVSAvoiddevice complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

A flash interface circuit is introduced as an intermediary component between the host system and multiple flash memory devices. The interface circuit manages device registration, address mapping, and data routing, thereby enabling expanded storage capacity while isolating the complexity of multi-device management from the host system.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The storage system is segmented into multiple independent flash memory devices managed through a centralized interface circuit. Each flash device operates independently but can be addressed and controlled through the interface circuit, allowing capacity expansion without requiring complete system redesign.

Inventive Principle:
Principle #1Segmentation

2Reliability

If virtual flash memory devices are implemented with enhanced attributes, then performance and reliability are improved, but manufacturing cost increases

Engineering Contradiction:
ImprovereliabilityVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

Virtual flash memory devices are created as software abstractions that copy and extend the functionality of physical flash devices. The interface circuit implements virtual devices with enhanced attributes such as improved error correction and wear leveling by managing multiple physical devices in parallel, thereby improving reliability without requiring expensive hardware changes to each individual flash device.

Inventive Principle:
Principle #26Copying

3Quantity of substance

If flash memory devices are designed for higher capacity, then storage capacity is improved, but die size and production cost increase

Engineering Contradiction:
Improvestorage capacityVSAvoiddie size
Core Design Contradiction:
Quantity of substanceVSArea of stationary object

Solution Approach 1:

Instead of increasing capacity within a single die, the system transitions to a multi-dimensional architecture where multiple smaller flash devices are managed through an interface circuit. This allows the system to achieve higher total capacity by utilizing multiple dies organized in arrays, thereby avoiding the need to increase the die size of individual devices.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS8751732B2System and method for increasing capacity, performance, and flexibility of flash storage
Publication Date: 2014.06.10 GOOGLE LLC
  • US8751732B2 patent drawing
  • US8751732B2 patent drawing
  • US8751732B2 patent drawing

AI summary

In one embodiment, an interface circuit is configured to couple to one or more flash memory devices and is further configured to couple to a host system. The interface circuit is configured to present at least one virtual flash memory device to the host system, wherein the interface circuit is configured to implement the virtual flash memory device using the one or more flash memory devices to which the interface circuit is coupled.