Flash Lamp Annealing for Shallow Junctions
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Solution Overview
Problem
Current semiconductor fabrication methods face challenges in achieving shallow impurity diffusion with low resistivity and minimizing crystal defects, as high-temperature annealing methods either cause deep impurity diffusion or fail to adequately fix crystal defects, while low-temperature methods compromise activation rates.
Innovation Solution
A semiconductor device fabrication method involving multiple impurity doping and annealing processes, including initial and final impurity doping followed by sequential light irradiations using a tungsten halogen lamp and flash lamp, with specific energy densities to control impurity diffusion and repair crystal defects, forming a shallow p-n junction with controlled leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high-temperature annealing (1000°C for 30 minutes) is performed to activate impurities, then impurity activation is achieved, but impurity diffusion occurs deeply in the substrate
Solution Approach 1:
The annealing process is divided into multiple sequential stages with different temperature profiles: a first annealing process at a lower temperature to activate impurities with minimal diffusion, followed by a second annealing process at a higher temperature to repair crystal defects. This segmentation allows each process to target specific objectives without compromising the other.
Solution Approach 2:
The first annealing process is performed preliminarily to activate impurities before the second annealing process repairs crystal defects. This preliminary activation ensures that impurities are fixed in place at shallow depths before any subsequent high-temperature processing that might cause diffusion.
2Length of moving object
If annealing time is reduced to minimize impurity diffusion, then diffusion depth is controlled, but crystal defects are not sufficiently repaired
Solution Approach 1:
The annealing process is divided into multiple sequential stages with different temperature profiles: a first annealing process at a lower temperature to activate impurities with minimal diffusion, followed by a second annealing process at a higher temperature to repair crystal defects. This segmentation allows each process to target specific objectives without compromising the other.
3Reliability
If laser annealing is used to provide instantaneous energy density for activation, then activation rate is improved, but surface morphology deteriorates due to melting or ablation
Solution Approach 1:
The patent changes the key parameters of the annealing process by using conventional lamp annealing with controlled energy density and extended time, rather than laser annealing's high instantaneous energy density. This parameter change achieves impurity activation while avoiding the surface damage associated with laser methods.
4Reliability
If RTA annealing is performed for several tens of seconds to activate impurities, then activation rate is improved, but impurity diffusion occurs deeply in the substrate
Solution Approach 1:
The annealing process is divided into multiple sequential stages with different temperature profiles: a first annealing process at a lower temperature to activate impurities with minimal diffusion, followed by a second annealing process at a higher temperature to repair crystal defects. This segmentation allows each process to target specific objectives without compromising the other.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively activates impurities without deep diffusion, reduces crystal defects, and forms a shallow diffusion layer with low resistivity, achieving a controlled leakage current and suitable junction depth for miniaturized semiconductor devices.
Implementation Method 1
annealing for activation through a first light irradiation using a tungsten halogen lamp
Implementation Method 2
annealing for activation through a first light irradiation using a tungsten halogen lamp annealing
Implementation Method 3
annealing for activation through a second light irradiation using a flash lamp
Implementation Method 4
Flash lamp annealing (FLA) method using a flash lamp that includes gas such as xenon
Data Source
AI summary
A shallow p-n junction diffusion layer having a high activation rate of implanted ions, low resistivity, and a controlled leakage current is formed through annealing. Annealing after impurities have been doped is carried out through light irradiation. Those impurities are activated by annealing at least twice through light irradiation after doping impurities to a semiconductor substrate 11. The light radiations are characterized by usage of a W halogen lamp RTA or a flash lamp FLA except for the final light irradiation using a flash lamp FLA. Impurity diffusion may be controlled to a minimum, and crystal defects, which have developed in an impurity doping process, may be sufficiently reduced when forming ion implanted layers in a source and a drain extension region of the MOSFET or ion implanted layers in a source and a drain region.


