Flash Memory Page Address Mapping Condensing Boot Read Overhead
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing flash memory-based systems face performance degradation during boot operations due to the large size of page mapping tables, which require numerous read operations to retrieve mapping information, leading to increased time overhead and reduced system efficiency.
Innovation Solution
A page-level address mapping method that condenses mapping information using sequential features of logical addresses and data size, storing reduced mapping information in DRAM and SRAM within the flash translation layer, and reconstructing it into a flash memory mapping table for efficient data retrieval during boot operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a complete page mapping table is stored in DRAM to maintain mapping information for all pages, then mapping accuracy is improved, but the size of the mapping table increases leading to more read operations and degraded boot performance
Solution Approach 1:
The patent extracts only the necessary mapping information from the complete page mapping table. Instead of storing all page mappings in DRAM, it selectively stores condensed mapping information that contains only the essential data needed for boot operations, thereby reducing the number of read operations while maintaining sufficient mapping accuracy.
Solution Approach 2:
The patent inverts the conventional approach by not storing complete mapping information but rather storing condensed mapping information with a start address and size. This inverted approach reduces memory usage and read operations while still enabling accurate address translation through calculation based on the condensed data.
2Quantity of substance
If mapping information is condensed using sequential features of logical addresses and data size, then the size of the page mapping table is reduced, but the complexity of the mapping system increases
Solution Approach 1:
The patent changes the parameters of mapping information from storing complete page-by-page mappings to storing condensed information with start address and size parameters. This parameter change reduces the quantity of mapping data while the added complexity of calculating physical addresses is offset by the significant reduction in memory operations during boot.
3Productivity
If the number of read operations is decreased by reducing mapping table size, then boot performance is improved, but the ability to handle random write access patterns may be degraded
Solution Approach 1:
The patent segments mapping information into condensed units with start addresses and sizes. This segmentation allows the system to efficiently handle boot operations with reduced read operations while maintaining the ability to manage flash memory operations by dividing the mapping space into manageable segments defined by the condensed information.
Data Source
AI summary
The present invention relates to a method for a page-level address mapping based on flash memory and a system thereof. A method for a page-level address mapping based on a flash memory according to an embodiment of the present invention includes the steps of: receiving a write operation from a file system; generating condensed mapping information using a size of data information of the write operation and a start logical address of sequentially allocated logical addresses of the write operation; and storing the condensed mapping information as a first mapping table in a memory of a flash translation.