Flash Mapping Table Updates Using Temporary F2H Checkpoints
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Solution Overview
Problem
NAND flash devices face inefficiencies in executing host write commands due to their serial access nature, which complicates the management of host-address to flash-address mapping, particularly in scenarios involving sudden power loss.
Innovation Solution
A method and apparatus that utilize a temporary flash-address to host-address mapping table in RAM, adjusting the flushing number based on flash module availability and garbage collection processes, and updating host-address to flash-address mapping sub-tables into designated physical addresses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If mapping table updates are performed frequently to ensure data integrity, then reliability is improved, but computation overhead and execution time increase
Solution Approach 1:
The patent pre-allocates a temporary F2H region in RAM before programming user data, preparing the mapping table structure in advance. This preliminary action allows the mapping information to be ready for quick updates without requiring complex computations during the actual data programming operation, thus maintaining data integrity while reducing computation overhead.
Solution Approach 2:
The system automatically updates the H2F sub-tables using the mapping information from the temporary F2H region without requiring external intervention or complex processing. The update mechanism serves itself by utilizing the pre-prepared mapping data, reducing the computational burden while ensuring data consistency.
2Productivity
If mapping table updates are performed less frequently to reduce computation overhead, then productivity is improved, but data integrity during sudden power loss is compromised
Solution Approach 1:
By pre-allocating and preparing the temporary F2H region with mapping information before actual data programming, the system reduces the frequency and complexity of updates needed during operation. This preliminary preparation maintains productivity while ensuring that mapping data is available for integrity protection.
Solution Approach 2:
The temporary F2H region in RAM acts as an intermediary structure that holds mapping information during the programming process. This intermediary allows the system to maintain mapping data without frequent updates to the permanent H2F sub-tables, improving productivity while the intermediary itself ensures data integrity can be maintained.
3Manufacturing precision
If more RAM is allocated for temporary F2H region to store complete mapping tables, then manufacturing precision is improved, but device complexity and cost increase
Solution Approach 1:
The patent divides the mapping table into segments: the complete H2F sub-tables are stored in flash memory, while only the necessary temporary F2H region is allocated in RAM. This segmentation allows accurate mapping information to be maintained without requiring the entire mapping table to reside in RAM simultaneously, reducing device complexity while maintaining mapping precision.
Solution Approach 2:
The essential mapping information is extracted and stored in the temporary F2H region in RAM for active use, while the complete mapping tables remain in flash memory. This extraction allows the system to work with precise mapping data in RAM without the complexity of managing large RAM allocations for complete tables.
4Reliability
If the flushing number is increased to update more mapping records, then reliability is improved, but loss of time increases due to more extensive updates
Solution Approach 1:
The mapping information is prepared in the temporary F2H region in advance, allowing bulk updates to be performed efficiently. By having the mapping data ready beforehand, the system can update multiple records in a coordinated manner rather than individually, improving reliability while minimizing the total update time.
Data Source
AI summary
The invention introduces a method for updating a host-address to flash-address mapping table, performed by a processing unit, to include: allocating a temporary flash-address to host-address mapping (F2H) region in a random access memory (RAM) for storing an F2H table corresponding to a current block; setting a flushing number according to information whether available space in a flash module is sufficient, or whether a garbage collection (GC) process is performed while the user data is programmed into the flash module; and updating mapping information of host-address to flash-address mapping (H2F) sub-tables according to mapping information in the flushing number of records stored in the temporary F2H region, and programming updated H2F sub-tables into a designated physical address of the flash module in response that the user data has been programmed into a physical address of the current block, which corresponds to a checkpoint.