Flash Memory Marker Pattern for ECC-Safe Data Status Updates
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Solution Overview
Problem
Flash memories face challenges in modifying data due to their constraint of erasing entire blocks, which leads to high bit error rates and inefficiencies in error correction, particularly when trying to change individual bits or erase '1' to '0', and the use of all-1 patterns can be invalid or not ECC valid, limiting their usage.
Innovation Solution
A method and memory controller that program a predetermined data pattern as a marker in flash memories, allowing for data status evaluation without modifying error correcting data, enabling flexible data management and reducing the need for entire block reprogramming by using a predetermined data pattern that is ECC valid and does not alter existing error correcting bits, even when changing individual bits or erasing data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If entire blocks are erased in flash memory to modify data, then data modification is possible, but memory cell stress increases and programming efficiency decreases
Solution Approach 1:
The memory block is segmented into data bits and dedicated marker bits. By modifying only the marker bits rather than erasing entire blocks, the patent enables granular data status indication without the need for full block erasure, thereby reducing memory cell stress while maintaining data modification capability.
Solution Approach 2:
Dedicated marker bits are extracted from the data storage structure and assigned a separate function indicating data status (valid/invalid). This separation allows the data bits to be preserved while the marker bits convey modification information, eliminating the need to erase entire blocks for data status changes.
2Ease of manufacture
If entire blocks are erased in flash memory to modify data, then data modification is possible, but programming time and energy consumption increase
Solution Approach 1:
The memory block is segmented into data bits and dedicated marker bits. By modifying only the marker bits rather than erasing entire blocks, the patent enables granular data status indication without the need for full block erasure, thereby reducing memory cell stress while maintaining data modification capability.
Solution Approach 2:
Instead of performing the excessive action of erasing entire blocks, the patent applies partial action by modifying only the necessary marker bits. This selective modification achieves the desired data status indication with minimal programming operations, significantly improving programming efficiency and reducing energy consumption.
3Ease of operation
If all-1 patterns are used as markers in flash memory, then data status can be indicated, but ECC validity may be compromised
Solution Approach 1:
The patent changes the parameter of the marker pattern from the conventional all-1 pattern to a dedicated pattern specifically designed to maintain ECC validity. This pattern is chosen such that it does not trigger false error corrections and maintains proper error correction code functionality while still effectively indicating data status.
Solution Approach 2:
A dedicated marker pattern acts as an intermediary between the data bits and the ECC system. This intermediate pattern conveys data status information without interfering with the ECC validation process, preventing false error corrections while maintaining reliable error detection and correction capabilities.
Data Source
AI summary
A method and a memory controller for accessing a non-volatile memory are disclosed. The method includes reading a first memory region of the non-volatile memory, ascertaining whether the first memory region contains a predetermined data pattern wherein the predetermined data pattern has no influence on resulting error correcting data determined for at least the first memory region. The method evaluating a data status for a second memory region of the non-volatile memory on the basis of a presence of the predetermined data pattern in the first memory region, wherein the data status indicates at least one of whether valid data is present within the second memory region and whether the second memory region is writable.