AC Disturbance Control in Flash Memory via Bit Line Pre-Charging
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Solution Overview
Problem
Conventional flash memory systems experience disturbances during AC operations like programming, reading, and erasing due to electron injection, leading to errors and false programming of neighboring memory cells, primarily caused by voltage differences and channel effects.
Innovation Solution
The implementation of an AC disturbance control component that pre-charges all bit lines to a specific voltage and ensures that source and drain voltages change at the same time during AC operations, minimizing voltage differences and reducing electron injection-induced disturbances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional programming operations are performed in flash memory, then data can be written to memory cells, but electron injection causes disturbances and false programming in neighboring cells
Solution Approach 1:
The patent applies preliminary action by pre-charging all bit lines to a specific voltage level (e.g., Vcc) before initiating the programming operation on the selected memory cell. This pre-charging step ensures that neighboring bit lines are already at the appropriate voltage potential, preventing voltage differentials that would cause electron injection and disturbances during the subsequent programming pulse. The pre-charge operation is performed in advance to eliminate the harmful effect before it can occur.
Solution Approach 2:
The patent implements equipotentiality by maintaining all bit lines at the same voltage level (Vcc) through pre-charging before the programming operation. By ensuring that all bit lines are at equipotential conditions, the patent prevents current flow through the channel of neighboring memory cells that would otherwise occur due to voltage differences, thereby eliminating electron injection and false programming disturbances.
2Ease of manufacture
If voltage is applied to program a selected memory cell, then programming can occur, but voltage differences cause current flow through neighboring cells resulting in false programming
Solution Approach 1:
The patent introduces an intermediary control mechanism that manages the timing and voltage levels of bit line pre-charging relative to the programming operation. This intermediary control ensures that the bit lines are pre-charged to the appropriate voltage level before the programming pulse is applied, acting as a mediator that prevents the direct harmful interaction between the programming voltage and neighboring cell channels. The control logic coordinates the pre-charge and program operations to eliminate false programming while maintaining simple programming procedures.
3Productivity
If fast programming is performed, then productivity increases, but AC disturbances from electron injection increase causing more errors
Solution Approach 1:
The patent applies preliminary action by pre-charging all bit lines to the appropriate voltage level before initiating the fast programming operation. This pre-charge step is performed in advance and does not significantly slow down the overall programming speed, while it effectively eliminates the AC disturbances caused by electron injection during the actual programming pulse by ensuring neighboring bit lines are already at the correct potential.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively minimizes AC disturbances, reducing false programming and errors by maintaining consistent voltage changes across memory cells, thereby enhancing data integrity and reliability during memory operations.
Implementation Method 1
AC disturbances can occur within a cell due to electron injection
Implementation Method 2
AC disturbances can occur within a cell due to electron injection as well as in neighboring cells due to a channel effect
Data Source
AI summary
A system and methodology that can minimize disturbance during an AC operation associated with a memory, such as, program, read and/or erase, is provided. The system pre-charges all or a desired subset of the bit lines in a memory array to a specified voltage, during an AC operation to facilitate reducing AC disturbances between neighboring cells. A pre-charge voltage can be applied to all bit lines in a block in the memory array, or to bit lines associated with a selected memory cell and neighbor memory cells adjacent to the selected memory cell in the block. The system ensures that source and drain voltage levels can be set to desired levels at the same or substantially the same time, while selecting a memory cell. This can facilitate minimizing AC disturbances in the selected memory cell during the AC operation.