Flash Memory Grouping to Reduce LED Controller Pins
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Solution Overview
Problem
The high number of control pins required for LED controllers to access multiple flash memories in large-scale LED displays increases circuit costs, particularly as the number of light boards increases.
Innovation Solution
A novel operational method for accessing flash memories involves grouping them differently for each control signal (select, clock, and command) to reduce the number of control pins needed, using a combination of select signals, clock signals, and command signals to decode and select specific memories.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a great number of control pins are deployed to access multiple flash memories, then the LED controller can obtain compensation data from all light boards, but the circuit costs increase considerably
Solution Approach 1:
The flash memories are divided into multiple groups, where each group shares common control pins (select signal, clock signal, command signal). By segmenting the memory access into groups, the controller can multiplex the use of control pins across different memory groups at different time slots, reducing the total number of pins required while maintaining the ability to access all memories
Solution Approach 2:
The control pins are designed to serve multiple functions by being shared across different groups of flash memories. The same select pin, clock pin, and command pin can be reused for different memory groups through time-division multiplexing, making each pin universal rather than dedicated to a single memory device
2Productivity
If the number of light boards increases in LED display, then the display resolution and coverage improve, but the number of control pins required increases accordingly
Solution Approach 1:
The control pin allocation is made dynamic through time-division multiplexing. Instead of statically assigning dedicated pins to each memory, the system dynamically switches which group of memories is active at any given time, allowing the same pins to serve different purposes at different times. This dynamic approach enables the system to handle increased display capacity without proportionally increasing pin count
Data Source
AI summary
An operational method for a plurality of memories includes steps of: outputting a select signal to a first group of memories among the plurality of memories, but not outputting the select signal to a second group of memories among the plurality of memories different from the first group; outputting a clock signal to a third group of memories among the plurality of memories, but not outputting the clock signal to a fourth group of memories among the plurality of memories different from the third group; outputting a command to a fifth group of memories among the plurality of memories, but not outputting the command to a sixth group of memories among the plurality of memories different from the fifth group; and selecting one of the plurality of memories according to the select signal, the clock signal and the command.