Flash Memory Access Module Soft Decoding Error Correction

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Solution Overview

Problem

MLC Flash memories suffer from high error rates due to unstable characteristics, and traditional error correction mechanisms are inadequate for handling burst errors, necessitating improved memory access management.

Innovation Solution

A method and module for performing memory access management that includes initial and subsequent sensing operations to determine threshold voltages, generating digital values, and performing soft decoding based on these voltages to enhance error correction capability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If MLC Flash memories are used to increase storage density, then storage capacity is improved, but error rate increases due to unstable characteristics

Engineering Contradiction:
Improvestorage capacityVSAvoiderror rate
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies preliminary action by performing multiple sensing operations before final data retrieval to predict and compensate for threshold voltage shifts. The system performs initial sensing, predicts threshold voltage based on read disturbance effects, and adjusts subsequent sensing operations accordingly, preventing error accumulation before it occurs.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback mechanisms where the result of each sensing operation influences subsequent sensing operations. The system uses the outcome of initial sensing to adjust voltage levels and timing for subsequent reads, creating a closed-loop system that adapts to actual cell behavior and compensates for instabilities in real-time.

Inventive Principle:
Principle #23Feedback

2Device complexity

If traditional error correction mechanisms are used, then implementation is simple, but error correction capability is insufficient for burst errors

Engineering Contradiction:
Improvemechanism simplicityVSAvoiderror correction capability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent segments the error correction process into multiple independent sensing operations rather than relying on a single comprehensive correction mechanism. Each sensing operation captures specific error patterns, and the results are combined to achieve superior error correction capability, particularly for burst errors that would overwhelm traditional single-stage mechanisms.

Inventive Principle:
Principle #1Segmentation

3Reliability

If multiple sensing operations are performed to improve error correction, then error rate decreases, but access time increases

Engineering Contradiction:
Improveerror rateVSAvoidaccess time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent employs periodic action by performing sensing operations at specifically timed intervals rather than continuously. The system executes initial sensing, waits for predicted threshold voltage stabilization, then performs subsequent sensing operations. This periodic approach minimizes access time while ensuring sufficient measurements for accurate error correction.

Inventive Principle:
Principle #19Periodic action

4Speed

If higher sensing voltages are applied to MLC cells, then read speed is improved, but error rate increases due to cell instability

Engineering Contradiction:
Improveread speedVSAvoiderror rate
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies dynamics by making sensing voltages adaptive rather than fixed. The system adjusts voltage levels based on the specific cell state, threshold voltage predictions, and observed error patterns. This dynamic voltage adjustment optimizes read speed for each individual operation while preventing error induction that would occur with consistently high voltages on unstable MLC cells.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20250210106A1Memory access module for performing a plurality of sensing operations to generate digital values of a storage cell in order to perform decoding of the storage cell
Publication Date: 2025.06.26 SILICON MOTION INC
  • US20250210106A1 patent drawing
  • US20250210106A1 patent drawing
  • US20250210106A1 patent drawing

AI summary

A method for performing memory access of a Flash cell of a Flash memory includes: performing an initial sensing operation according to an initial sensing voltage; performing at least a subsequent sensing operation according to a sensing voltage having a value which is higher or lower than the initial sensing voltage according to whether a result of the initial sensing operation is that current flows through the Flash cell; generating a digital value according to the subsequent sensing operation; determining a threshold voltage of the Flash cell according to the generated digital value; and performing soft decoding of the Flash cell according to the determined threshold voltage.