Flash Memory Adaptive Voltage Programming Erase
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Solution Overview
Problem
Flash memory experiences rapid deterioration in endurance and data holding characteristics due to electron trapping and leakage, especially as the number of program/erase cycles increases, leading to issues with voltage requirements and pulse duration, which accelerates gate oxide film deterioration.
Innovation Solution
A non-volatile semiconductor memory device that applies multiple programming and erase pulses with adaptive voltage adjustments based on verify results, storing and updating voltage information in a predefined region to optimize programming and erase operations, thereby maintaining appropriate voltage levels and reducing the number of pulses needed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple programming and erase pulses are applied with adaptive voltage adjustments, then data retention and endurance are improved, but the complexity of control operations increases
Solution Approach 1:
The patent implements feedback mechanisms through verify operations after programming and erase pulses. The controller adjusts subsequent pulse voltages based on verify results, creating a closed-loop control system that improves data retention while managing complexity through automated feedback-driven adjustments
Solution Approach 2:
The patent applies dynamic voltage adjustment where programming and erase pulse voltages are adaptively modified based on memory cell state and verify results. This dynamic approach allows the system to optimize between reliability and complexity by adjusting control parameters in real-time rather than using fixed complex sequences
2Duration of action of stationary object
If the number of programming and erase pulses is reduced, then the lifespan of flash memory is extended, but the completeness of programming and erasing operations may be compromised
Solution Approach 1:
The patent changes voltage parameters adaptively based on memory cell response. By adjusting pulse voltage levels and durations dynamically rather than using fixed high-count sequences, the system achieves complete programming and erasing with fewer pulses, thereby extending flash memory lifespan while maintaining operational completeness
Solution Approach 2:
The patent performs preliminary verify operations before committing to additional pulses. This preliminary checking allows the system to determine early whether fewer pulses are sufficient, preventing unnecessary pulse applications that would reduce lifespan while ensuring programming and erasing completeness is achieved
3Manufacturing precision
If high voltage is applied to ensure proper threshold voltage shifting, then programming and erasing effectiveness is improved, but oxide film deterioration accelerates
Solution Approach 1:
The patent applies dynamic voltage adjustment where programming and erase pulse voltages are adaptively modified based on memory cell state and verify results. This dynamic approach allows the system to use high voltage only when necessary for threshold voltage shifting while reducing voltage in subsequent operations, thereby maintaining effectiveness while slowing oxide film deterioration
Solution Approach 2:
The patent uses periodic programming and erase pulse sequences with varying voltage levels. By alternating between different voltage magnitudes in a structured periodic manner rather than continuous high voltage, the system achieves proper threshold voltage shifting while providing recovery intervals that reduce cumulative oxide film stress and deterioration
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach extends the lifespan of flash memory by preventing rapid deterioration, ensuring consistent data retention and reducing the number of pulses required, thus slowing down the degradation of memory cells and maintaining data integrity.
Implementation Method 1
When a programming (write-in) operation is performed, a high voltage is applied to the control gate and 0V is applied to the channel. As such, electrons pass through the oxide film by Fowler-Nordheim tunneling (F-N tunneling) and are accumulated in the floating gate.
Data Source
AI summary
A non-volatile semiconductor memory includes a memory array. In a programming operation, programming pulses are applied to a page of the memory array to program data to the page. In an erase operation, erase pulses are applied to a block of the memory array to erase data in the block. The non-volatile semiconductor memory performs a pre-program operation before the erase operation and a post-erase operation after the erase operation. In the pre-program operation, each page of the block is programmed according to voltage information relating programming pulses. In the erase operation, data in the block is erased according to the voltage information relating programming pulses.