Flash Memory Address Anomaly Detection Using Reference Tuples
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Solution Overview
Problem
Flash memory devices suffer from addressing anomalies that lead to large-scale overwrite errors, rendering the entire memory unusable due to bit position addressing faults in the address translation logic.
Innovation Solution
A detection method for memory storage devices that involves selecting a reference tuple, determining physical addresses with offsets, reading contrast tuples, and comparing read results with test data to identify anomalous bit positions, thereby establishing a valid physical address table for stable data storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If address decoding logic is used to map addresses to storage cells, then addressing capability is improved, but addressing anomalies cause large-scale overwrite errors that render the entire flash memory unusable
Solution Approach 1:
The patent performs preliminary detection of addressing anomalies before normal data storage operations. By selecting a reference tuple and multiple contrast tuples, writing test data to the reference tuple, and then attempting to read from contrast tuples using addresses derived from the reference tuple address, the system proactively identifies potential addressing faults before they cause data loss during normal operation.
Solution Approach 2:
The patent creates contrast tuples that are copies or counterparts of the reference tuple, using address offsets to generate variant addresses. These contrast tuples serve as test targets to verify addressing logic without affecting actual data storage, allowing safe detection of addressing anomalies.
2Reliability
If entire flash memory is discarded due to addressing anomalies, then data integrity is protected, but storage capacity is significantly reduced
Solution Approach 1:
The patent divides the flash memory into tuples (smaller addressable units) and performs detection on a per-tuple basis. When an addressing anomaly is detected, only the specific tuple or address range involved is marked as invalid, rather than discarding the entire flash memory. This segmentation approach preserves the majority of usable storage capacity while maintaining data integrity.
Solution Approach 2:
The patent applies local quality by treating different regions of flash memory differently based on detection results. Valid tuples remain available for normal data storage, while only the specific anomalous tuple is marked as invalid. This allows the system to maintain high storage capacity utilization while ensuring data integrity in the valid regions.
3Measurement precision
If address offsets are used to generate contrast tuple addresses, then detection coverage is improved, but calculation complexity increases
Solution Approach 1:
The patent uses address offsets as parameters to generate contrast tuple addresses from the reference tuple address. By systematically varying the address offset parameter, the detection method achieves comprehensive coverage of different address patterns and potential addressing anomalies, while the offset mechanism itself provides a simple and systematic way to generate test addresses.
Data Source
AI summary
A detection method for a memory storage device and a non-transitory computer-readable recording medium are provided. The memory storage device includes a rewritable non-volatile memory module including physical tuples. The method includes: selecting a physical tuple from the physical tuples as a reference tuple, determining physical addresses according to a physical address of the reference tuple and predetermined address offsets, and treating the physical tuples corresponding to the physical addresses as contrast tuples; writing test data into the reference tuple; reading a first contrast tuple from the contrast tuples according to a first physical address among the physical addresses to obtain a first read result; and determining whether an addressing anomaly occurs according to the first read result and the test data. In this method, it can be determined whether an error occurs in an addressing process, and a location where an addressing anomaly occurs can be determined.