Flash Memory Address Mapping via Serial Bit Re-mapping
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional systems using flash memory devices are inefficient in terms of cost and space utilization, as they require larger, single-sized devices rather than combinations of smaller devices to meet capacity requirements, leading to increased costs and unnecessary space usage.
Innovation Solution
An embedded controller with a decoding unit and a common bus system allows for flexible selection and re-mapping of serial addressing bits to access multiple flash memory devices, enabling the chipset and embedded controller to share memory modules and optimize memory usage by redirecting read/write cycles between different flash memory devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a single large-size flash memory device is used to meet capacity requirements, then the system can satisfy memory capacity needs, but the cost and space utilization become inefficient
Solution Approach 1:
The patent segments the memory capacity requirement into multiple smaller flash memory devices instead of using a single large device. The decoding unit divides the address space and redirects read/write cycles to different flash memory devices based on serial addressing bits, enabling the system to meet total capacity requirements while using multiple smaller, more cost-effective devices.
2Quantity of substance
If a single large-size flash memory device is used to meet capacity requirements, then the system can satisfy memory capacity needs, but the space required to accommodate the flash memory devices increases
Solution Approach 1:
The patent segments the memory capacity requirement into multiple smaller flash memory devices instead of using a single large device. The decoding unit divides the address space and redirects read/write cycles to different flash memory devices based on serial addressing bits, enabling the system to meet total capacity requirements while using multiple smaller, more cost-effective devices.
3Ease of manufacture
If multiple flash memory devices are used to meet capacity requirements, then the cost and space utilization improve, but the system complexity increases
Solution Approach 1:
The patent implements a universal decoding unit that handles multiple flash memory devices through a single interface. The decoding unit determines which flash memory device should be accessed based on serial addressing bits and redirects read/write cycles accordingly, allowing the system to manage multiple devices without proportionally increasing interface complexity.
4Ease of manufacture
If multiple flash memory devices are used to meet capacity requirements, then the cost and space utilization improve, but the address mapping complexity increases
Solution Approach 1:
The decoding unit serves as an intermediary between the address input and the flash memory devices. It receives serial addressing bits, determines which flash memory device should be accessed based on the address range, and redirects read/write cycles to the appropriate device, simplifying the address mapping process.
Data Source
AI summary
A solution is provided to flexibly choose a combination of flash memory devices to reduce the overall cost of the flash memory devices or increase the overall utilization of the flash memory devices, while satisfying the capacity requirements for the flash memory devices in a system design, wherein a decoding unit is used for determining which flash memory devices will be accessed and re-mapping incoming serial addressing bits, for accessing one flash memory device, into an outgoing serial addressing bits for accessing another flash memory device.