Flash Memory Air Gaps Reduce Bit Line Interference

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Solution Overview

Problem

The continuous miniaturization of flash memory devices leads to increased electrical interference between adjacent bit lines, affecting the electrical properties of the devices.

Innovation Solution

A method is developed to form air gaps between adjacent bit lines by creating trenches, filling them with a sacrificial layer, and removing it after forming a control gate structure, which reduces the relative dielectric constant and minimizes electrical interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If flash memory devices are continuously miniaturized, then device size is reduced and storage density is improved, but electrical interference between adjacent bit lines increases

Engineering Contradiction:

Improvedevice sizeVSAvoidelectrical interference

Core Design Contradiction:

Volume of moving objectVSObject-affected harmful factors

Solution Approach 1:

A sacrificial layer (oxide layer) is introduced as an intermediary substance between adjacent bit lines. This layer is temporarily formed to support the structure during fabrication, then selectively removed to create air gaps that reduce electrical interference while maintaining the miniaturized device geometry

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The dielectric constant parameter is changed by replacing solid dielectric material with air gaps (lower dielectric constant). This parameter change reduces the electrical interference between bit lines while allowing the device to maintain its miniaturized form factor

Inventive Principle:

Principle #35Parameter changes

2Reliability

If air gaps are formed between adjacent bit lines, then electrical interference is reduced and electrical properties are improved, but device fabrication complexity increases

Engineering Contradiction:

Improveelectrical propertiesVSAvoidfabrication process

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The sacrificial oxide layer is formed in advance before the final device structure is completed. This preliminary action allows the air gaps to be created through selective removal, achieving the electrical interference reduction goal while managing fabrication complexity through staged processing

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The sacrificial oxide layer serves as a temporary, disposable element that is formed and then removed to create the desired air gap structure. This approach simplifies the overall fabrication by using a temporary structure that enables the final configuration without requiring complex direct air gap formation techniques

Inventive Principle:

Principle #27Cheap short-living objects (Disposable)

Data Source

PatentUS10868022B2Flash memory device and fabrication method thereof

Publication Date: 2020.12.15 SEMICON MFG INT (SHANGHAI) CORP

AI summary

Flash memory devices and fabrication methods thereof are provided. An exemplary method includes providing discrete bit lines on a semiconductor substrate, a first dielectric layer on top surfaces of the bit lines, and a floating gate structure on the first dielectric layer, trenches being formed between adjacent bit lines and on the semiconductor substrate; forming a sacrificial layer with a top surface above the top surfaces of the bit lines in the trenches; forming a second dielectric layer on top and side surfaces of the floating gate structure and the top surface of the sacrificial layer; forming a control gate structure on the second dielectric layer; removing portions of the second dielectric layer, the floating gate structure and the first dielectric layer to expose a portion of the sacrificial layer; and removing the sacrificial layer from the adjacent bit lines and the semiconductor substrate, thereby forming air gaps.