Flash Memory Amplifier Merging Local Bit Lines
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Solution Overview
Problem
In semiconductor devices, particularly in flash memory, increasing the number of bits that can be written at once leads to an excessive increase in the area required for data buses and local sense amplifiers, limiting the chip size and write speed.
Innovation Solution
A semiconductor device with a plurality of memory cells, local bit lines, and a first amplifier that determines the transition speed of the output level to transfer multivalued data to a read global bit line, reducing the number of global bit lines and sense amplifiers needed, thereby minimizing the device area and enhancing write throughput.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the number of global bit lines and local sense amplifiers is increased to write more bits simultaneously, then the write throughput is improved, but the device area increases excessively
Solution Approach 1:
The patent merges multiple local bit line data into a single read global bit line by using a first amplifier that processes combined data from multiple local bit lines. This allows multiple bits to be written simultaneously while using fewer global bit lines and sense amplifiers, thereby increasing write throughput without proportionally increasing device area.
Solution Approach 2:
The first amplifier serves multiple functions: it receives read data from each local bit line, determines transition speed of output levels, and transfers multivalued data to the read global bit line. This multi-functional approach reduces the number of dedicated components needed, improving productivity while controlling device area.
2Speed
If the number of global bit lines is increased to transmit more data simultaneously, then the write speed is improved, but the device complexity increases
Solution Approach 1:
The patent combines data from multiple local bit lines into a single read global bit line through the first amplifier. This merging approach allows simultaneous writing of multiple bits (improving write speed) while reducing the number of global bit lines needed (reducing device complexity).
Solution Approach 2:
The first amplifier acts as an intermediary that processes and consolidates data from multiple local bit lines before transmitting to the global bit line. This intermediary function enables high-speed parallel writing while maintaining manageable system complexity through centralized data processing.
Data Source
AI summary
A semiconductor device includes: a plurality of memory cells; a plurality of local bit lines connected to respective memory cells of the plurality of memory cells; and a first amplifier. The first amplifier receives read data from each local bit line of the plurality of local bit lines and determines a transition speed of an output level of the first amplifier in response to receiving a combination of at least two pieces of read data. The first amplifier transfers, based on the determined transition speed, multivalued data of the read data to a read global bit line.