Flash Memory Programming Time Control Using Bit Error Rate
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Solution Overview
Problem
Flash memory devices degrade over time and repeated programming/erasing cycles, leading to inefficient access speeds as lightly used cells are accessed quickly while worn cells are accessed slowly, regardless of actual error rates.
Innovation Solution
A method for programming nonvolatile memory cells that adjusts programming time based on error-check results from code-words read from the cells, increasing time if the bit error rate exceeds a threshold, rather than relying solely on counted program/erase cycles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If program time is extended for worn memory cells, then reliability is improved, but productivity deteriorates due to increased programming time for all cells
Solution Approach 1:
The patent applies different program times to different memory blocks based on their individual error rates. Blocks with high error rates (worn cells) receive extended program times, while blocks with low error rates (fresh cells) use standard program times. This localized adaptation resolves the contradiction by applying reliability enhancement only where needed, preserving productivity for the majority of cells that don't require extended programming.
Solution Approach 2:
The patent dynamically changes the program time parameter based on measured error rates from code-word reads. By monitoring the bit error rate and adjusting the program time accordingly, the system adapts to the actual condition of memory blocks rather than using fixed timing. This parameter adjustment resolves the contradiction by extending time only for blocks that exhibit degradation, maintaining fast programming for blocks that haven't degraded.
2Reliability
If program time is increased for all cells, then reliability is improved, but loss of time increases
Solution Approach 1:
The patent implements selective program time extension based on local error conditions in specific memory blocks. Rather than uniformly increasing program time for all cells, the system identifies blocks with high error rates and extends programming only for those blocks. This localized approach improves reliability where needed while minimizing the loss of time for the overall programming operation.
Solution Approach 2:
The system performs self-diagnosis by reading code-words from programmed blocks and calculating error rates. Based on this self-assessment, the system automatically adjusts program times for subsequent operations on the same blocks. This self-service mechanism ensures reliability improvements are applied only when actually needed, avoiding unnecessary time loss for blocks that are functioning properly.
3Measurement precision
If error checking is performed on all blocks, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent performs error checking on a sample basis or selectively on blocks that require verification, rather than checking every single block. By applying error detection to only the necessary portions of memory, the system achieves sufficient measurement precision to identify degraded blocks without the excessive complexity of universal checking. This partial action approach maintains accuracy where needed while simplifying the overall control logic.
Data Source
AI summary
A method of programming target memory cells of a nonvolatile memory device includes; programming the target memory cells using an incrementally adjusted program time, reading a code word stored by the target memory cells and determining a bit error rate (BER) associated with the target memory cells in view of the read code word, and if the BER exceeds an upper BER limit, increasing the program time by a unit time.