Flash Memory Read Level Adjustment via Bias Functions
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Flash memory devices experience increased bit error rates due to variations in optimal read threshold values across wordlines, leading to compromised SSD performance, increased latency, and reduced endurance, as existing methods require storing multiple bias voltages for each wordline, which is not feasible from a memory standpoint.
Innovation Solution
The method involves selecting a bias function corresponding to a wordline from a group of bias functions, determining a bias value based on the selected function, and adjusting the read level in non-volatile memory to perform memory access operations, using either constant or higher-order functions to track deviations from optimal read thresholds, thereby reducing the number of stored bias values and improving memory efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple bias voltages are stored for each wordline to maintain accurate read thresholds, then read accuracy is improved, but memory footprint increases significantly
Solution Approach 1:
The patent segments the bias voltage adjustment into two components: a global bias voltage applied to all wordlines, and local bias voltages applied individually to each wordline. This segmentation allows the system to maintain read accuracy for each wordline while minimizing the total number of stored bias values, as the global bias captures common variations across all wordlines.
Solution Approach 2:
The patent applies local quality by allowing each wordline to have its own specific bias voltage adjustment while sharing a common global bias. This enables targeted correction of wordline-specific threshold variations without requiring full individual calibration for every parameter, thus reducing memory footprint while maintaining local read accuracy.
2Reliability
If bias values are stored for each wordline to compensate for threshold variations, then read reliability is improved, but device complexity increases
Solution Approach 1:
The patent implements a dual-bias system where a single global bias voltage serves all wordlines simultaneously, providing universal compensation for common threshold variations. This multi-functional approach improves read reliability across the entire memory array while avoiding the complexity of managing separate bias systems for each wordline.
Solution Approach 2:
The patent changes the bias management parameter from storing multiple independent bias voltages per wordline to storing a combination of one global bias and fewer local biases. This parameter transformation reduces the overall complexity of bias management while maintaining or improving read reliability through the hierarchical bias structure.
3Productivity
If read levels are adjusted for each wordline to maintain performance, then SSD performance is improved, but computational overhead increases
Solution Approach 1:
The patent performs preliminary action by pre-calculating and storing the global bias voltage that compensates for common threshold variations across all wordlines. This pre-computed global bias is then applied universally, eliminating the need for complex real-time calculations during read operations and reducing computational overhead while maintaining SSD performance.
Solution Approach 2:
The patent uses copying by replicating the global bias voltage across all wordlines simultaneously. This single copied bias value provides performance improvement for the entire memory array without requiring individual computation for each wordline, thus minimizing computational overhead while maintaining consistent performance across all reads.
Data Source
AI summary
Disclosed is a system and method for adjusting read levels in a storage device based on bias functions. The method includes receiving a request to perform a memory access operation on a wordline of non-volatile memory. The method also includes selecting a bias function corresponding to the wordline of the non-volatile memory from a group of bias functions. The method also includes determining a bias value based on the selected bias function and the wordline. The method also includes adjusting a read level in the non-volatile memory based on the bias value. The method also includes performing the memory access operation on the wordline of the non-volatile memory using the adjusted read level. The bias functions may be linear functions and adjusted in response to detecting a recalibration condition.