Flash Memory Bit Cell Current Tracking via Temperature and Voltage Dependent Reference Currents

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Solution Overview

Problem

Flash memory architectures face challenges in accurately determining bit cell logic states due to fluctuations in bit cell current caused by temperature and voltage changes, leading to inaccurate data reading and increased wear, which results in higher current consumption and larger surface area requirements for generating reference currents.

Innovation Solution

A method that generates a reference current by summing temperature-dependent, voltage-dependent, and constant magnitude reference currents to accurately track bit cell current, using a programmable current mirror and current generators to adjust and trim the reference current, thereby improving logic state determination and reducing power consumption and space requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional reference devices are used to track bit cell current, then logic state determination accuracy is maintained, but current consumption and surface area increase

Engineering Contradiction:
Improvelogic state determination accuracyVSAvoidcurrent consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The reference current is divided into multiple independent components: a first reference current tracking temperature variations, a second reference current tracking voltage variations, and a third constant reference current. Each component is generated by separate circuitry with optimized current consumption, allowing the system to maintain accuracy while reducing total power usage compared to a single high-current reference device.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the parameters of reference currents to match the operating conditions of bit cells. By generating reference currents that vary with temperature and voltage parameters, the system maintains accurate logic state determination across different operating conditions without requiring excessive reference current magnitude, thus reducing overall current consumption.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If conventional reference devices are used to track bit cell current, then logic state determination accuracy is maintained, but surface area increases

Engineering Contradiction:
Improvelogic state determination accuracyVSAvoidsurface area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The reference current generation is segmented into multiple specialized circuits: temperature-tracking circuitry, voltage-tracking circuitry, and constant current sources. This segmentation allows each circuit to be minimized in size for its specific function, reducing the total surface area compared to a single large reference device that must handle all conditions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The sense amplifier is designed to universally handle multiple reference current components (first, second, and third reference currents) through a single sensing mechanism. This multi-functionality allows the system to maintain accurate logic state determination across varying temperature and voltage conditions without requiring separate amplifiers for each condition, thus reducing total surface area.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Measurement precision

If temperature and voltage dependent reference currents are generated, then bit cell current tracking accuracy is improved, but device complexity increases

Engineering Contradiction:
Improvebit cell current tracking accuracyVSAvoidreference current generation complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges multiple reference current generation functions into a unified reference current generation system that produces first, second, and third reference currents through coordinated circuitry. The sense amplifier also merges the comparison of these multiple currents with the bit cell current into a single operation, simplifying the overall control logic while maintaining high tracking accuracy across temperature and voltage variations.

Inventive Principle:
Principle #5Merging (Combining)

4Measurement precision

If multiple reference currents are summed and compared, then logic state determination accuracy is improved, but current consumption increases

Engineering Contradiction:
Improvelogic state determination accuracyVSAvoidcurrent consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent uses parameter changes in the reference currents to improve accuracy without increasing total current consumption. The first reference current changes with temperature, the second with voltage, and the third remains constant. By dynamically adjusting these parameters to match bit cell operating conditions, the system achieves accurate tracking using optimized current levels rather than simply summing high constant currents.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9691491B2Methods and apparatus to track bit cell current using temperature and voltage dependent reference currents
Publication Date: 2017.06.27 TEXAS INSTRUMENTS INC
  • US9691491B2 patent drawing
  • US9691491B2 patent drawing
  • US9691491B2 patent drawing

AI summary

An example method to track bit cell current in a memory architecture. An example method disclosed herein includes generating a first reference current dependent on bit cell temperature. The example method includes generating a second reference current dependent on bit cell voltage and supplying a third reference current of constant magnitude. In examples disclosed herein, the example method involves summing the first reference current, the second reference current, and the third reference current. The example method includes determining, with a sense amplifier, a bit cell logic state based on the first reference current, the second reference current, and the third reference current.