Flash Memory Bit Line Charging for Noise Reduction
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Solution Overview
Problem
Flash memory devices experience increased noise and higher precharging currents due to bit line coupling capacitance during programming operations, which can limit device performance and increase noise levels.
Innovation Solution
The solution involves charging both selected and unselected bit lines to a voltage during programming, distributing the capacitance over the data loading time to reduce peak current and minimize noise, thereby improving device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If bit lines are precharged before programming operations, then device noise is reduced, but precharging current increases
Solution Approach 1:
The patent segments the bit line precharging process by charging selected and unselected bit lines separately at different times. Selected bit lines are charged to an intermediate voltage while unselected bit lines are charged to a different voltage, allowing the precharging current to be distributed and managed in segments rather than all at once, thus reducing the peak current while still reducing noise
Solution Approach 2:
The patent changes the voltage parameter during the precharging process by using different voltage levels for selected versus unselected bit lines. This parameter change allows the system to reduce noise through precharging while managing the current draw by not charging all bit lines to the same high voltage simultaneously
2Object-affected harmful factors
If all bit lines are charged to the same voltage, then noise is minimized, but the capacitance load increases peak current
Solution Approach 1:
The patent applies local quality by charging selected bit lines to one voltage level and unselected bit lines to another voltage level. This creates different electrical conditions in different parts of the system (selected vs. unselected bit lines), allowing noise to be minimized in the selected lines while reducing the overall capacitance load and peak current by not charging all lines to the maximum voltage
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces device noise and improves performance by distributing the precharging current over the programming time, leading to more efficient data transfer and reduced noise levels.
Implementation Method 1
Flash memory devices experience increased noise and higher precharging currents due to bit line coupling capacitance during programming operations
Data Source
AI summary
Various embodiments include a circuit to receive data information, a memory array including memory cells coupled to a bit line, and control circuitry to charge the bit line while the data information is received at the circuit. The control circuitry may program the data information into a selected memory cell of the memory cells after the data information is received at the circuit. Other embodiments including additional methods, apparatus, and systems are disclosed.