Flash Memory Block Management via Logical-Physical Mapping

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Solution Overview

Problem

MLC Flash memories have unstable characteristics due to a low upper limit of erase count per block, leading to data loss and reduced device lifetime, necessitating a method to enhance data access control and reduce merging operations.

Innovation Solution

A method for managing Flash memory blocks involves recording linking information between logical and physical block addresses, selectively erasing blocks without valid pages, and updating this information to minimize erase counts and merging operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If MLC Flash memories are used to increase storage density, then storage capacity is improved, but erase count limit is reduced leading to unstable characteristics

Engineering Contradiction:
Improvestorage capacityVSAvoiderase count limit
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent divides the Flash memory into multiple virtual blocks mapped to physical blocks, allowing logical segmentation that separates data storage from erase operations. This enables independent management of erase counts for different virtual blocks while maintaining the physical block structure, thereby extending the effective erase count limit for data integrity purposes.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a mapping table as an intermediary between logical block addresses and physical block addresses. This mapping table acts as a mediator that tracks which physical blocks are associated with which logical blocks, enabling the system to manage erase counts at the logical level while performing physical erase operations only when necessary, thus extending reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of operation

If traditional Flash memory management is used, then data access is simple, but merging operations increase leading to more erase counts

Engineering Contradiction:
Improvedata access simplicityVSAvoidmerging operation frequency
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent performs preliminary actions by pre-establishing mapping tables that associate logical block addresses with multiple physical block addresses before data operations occur. This preliminary mapping allows the system to directly access data without performing merging operations during normal read/write operations, thereby maintaining ease of operation while reducing merging frequency.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements a mechanism that discards invalid mappings and recovers by creating new mappings in the mapping table. When a physical block is erased or becomes invalid, the system discards the old mapping and creates a new mapping that redirects to a valid physical block, thereby maintaining data accessibility without requiring frequent merging operations.

Inventive Principle:
Principle #34Discarding and recovering

3Reliability

If more merging operations are performed to manage blocks, then data integrity is maintained, but device lifetime is reduced due to increased erase counts

Engineering Contradiction:
Improvedata integrityVSAvoiddevice lifetime
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The patent segments the mapping table to track multiple physical blocks per logical block independently. This segmentation allows the system to manage data integrity at the logical block level while distributing erase operations across multiple physical blocks, thereby reducing the erase count impact on any single physical block and extending device lifetime.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements feedback mechanisms through the mapping table that continuously track which physical blocks are valid and which are not. When a physical block becomes invalid, the system receives feedback and updates the mapping table to redirect to valid blocks, maintaining data integrity while minimizing the need for frequent erase operations on the same physical blocks.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS8954646B2Method for managing a plurality of blocks of a flash memory, and associated memory device and controller thereof
Publication Date: 2015.02.10 SILICON MOTION INC
  • US8954646B2 patent drawing
  • US8954646B2 patent drawing
  • US8954646B2 patent drawing

AI summary

A method for managing a plurality of blocks of a Flash memory includes: recording/updating linking information regarding a logical block address, wherein the linking information includes a plurality of physical block addresses linking to the logical block address, and each physical block address represents a block of the plurality of blocks; and when a block represented by a physical block address of the plurality of physical block addresses has no valid page, selectively erasing the block and removing the physical block address from the linking information, wherein when a number of blocks that are within blocks represented by the physical block addresses and have no valid page reaches a predetermined value, erasing all of the blocks that have no valid page and removing physical block addresses thereof from the linking information.