Adaptive Flash Memory Block Erase Voltage Control
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Solution Overview
Problem
FLASH memory performance degrades over time due to increased voltage requirements for programming and erasing as it experiences more program/erase (P/E) cycles, leading to inefficient pulse trains and potential failure to meet performance requirements.
Innovation Solution
An adaptive technique that determines the age of a FLASH memory block by analyzing threshold voltages or P/E cycles to adjust the initial voltage of a pulse train, reducing the number of wasted pulses and improving erase times.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a static pulse train with fixed voltage levels is used for erasing FLASH memory, then the erase process is simple to implement, but the erase time increases significantly as the memory block ages
Solution Approach 1:
The patent applies dynamics by transitioning from a static pulse train with fixed voltage levels to a dynamic pulse train where voltage levels are adjusted based on the age of the FLASH memory block. The memory controller determines the block's age and selects appropriate voltage levels from multiple available levels, allowing the erase process to adapt to degradation over time and maintain efficient erase performance.
2Reliability
If higher voltage pulses are applied to erase aged FLASH memory blocks, then the erase operation can be completed, but the programming and erasing characteristics degrade requiring even higher voltages
Solution Approach 1:
The patent applies parameter changes by utilizing multiple voltage levels (first, second, and third voltage levels) instead of a single fixed voltage. The memory controller selects the appropriate voltage level based on the determined age of the FLASH memory block, optimizing the erase operation for different stages of memory degradation without requiring excessively high voltages that would further accelerate deterioration.
3Reliability
If the voltage of pulses in a pulse train is increased to account for memory aging, then erase effectiveness is maintained, but the number of wasted pulses increases
Solution Approach 1:
The patent applies preliminary action by determining the age of the FLASH memory block before initiating the erase operation. Based on this predetermined age information, the memory controller pre-selects the appropriate voltage levels for the pulse train, ensuring that the erase process starts with optimally tuned parameters rather than wasting pulses on inappropriate voltage levels.
4Device complexity
If a fixed voltage pulse train is used for all FLASH memory blocks, then the control logic is simple, but the programming and erasing characteristics cannot adapt to individual block aging
Solution Approach 1:
The patent applies local quality by tailoring the voltage levels of the pulse train to the specific age characteristics of each individual FLASH memory block. Instead of applying a uniform voltage scheme to all blocks, the memory controller determines the age of each block and applies customized voltage levels appropriate to that block's degradation state, optimizing performance for each local condition.
Data Source
AI summary
Embodiments described herein generally relate to programming and erasing a FLASH memory. In an embodiment, a method of programming or erasing the contents of a block of a FLASH memory includes determining a voltage of a pulse based on an age of the block and outputting the pulse to at least a portion of the block. The pulse is used to program or erase the block.