Flash Memory Block Erasing via Sequential Address Comparison
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Solution Overview
Problem
Conventional flash memory devices require inputting the address of each block during the erasing operation, which slows down the process when multiple blocks need to be erased, as all addresses must be individually specified.
Innovation Solution
A flash memory device and method that store the start and last block addresses, allowing for sequential erasing by outputting an erasing command signal and erasing voltages, and using a block selecting section to transmit these voltages to the corresponding blocks, with a block address comparing section to manage the erasing process until the last block is erased.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the address of each block is inputted individually during erasing operation, then the erasing operation can be performed on specific blocks, but the erasing speed decreases when multiple blocks need to be erased
Solution Approach 1:
The patent stores the start block address and last block address in advance before the erasing operation begins. This preliminary action allows the system to automatically sequence through all blocks between these addresses without requiring continuous manual address input, thereby increasing erasing speed while maintaining the ability to target specific block ranges.
2Reliability
If all block addresses are inputted to erase N blocks, then all specified blocks can be erased, but the time required for the erasing operation increases
Solution Approach 1:
The system performs self-service by automatically incrementing the block address counter and selecting subsequent blocks for erasing without external intervention. After the initial start and last block addresses are provided, the system autonomously manages the erasing sequence, comparing current block addresses with the stored last block address to determine when erasing is complete, thus eliminating the time loss associated with continuous address input.
3Productivity
If sequential erasing is implemented by storing start and last block addresses, then the erasing operation speed increases, but additional control circuits are required
Solution Approach 1:
The block address comparing section serves multiple functions: it compares the current block address with the stored last block address, generates the erase progress signal to indicate erasing status, and controls the termination of the erasing operation. This multi-functionality allows the patent to achieve sequential erasing with minimal additional circuitry, as the same comparing section handles address verification and operation control without requiring separate dedicated circuits for each function.
Data Source
AI summary
A flash memory device comprises a memory cell array having a plurality of blocks. An address register section is configured to receive a start block address of the first block to be erased among a plurality of blocks to be erased and a last block address of the last block to be erased among the plurality of blocks to be erased. A controlling logic circuit is configured to output an erase command signal and an erase block address corresponding to one of the blocks to be erased. A block address comparing section is configured to compare the erase block address output by the controlling logic circuit with the last block address, and output an erase progress signal based on the comparison of the erase block address and the last block address to the controlling logic circuit. The controlling logic circuit outputs an erase block address of to another block to be erased until the erase progress signal indicates that the last block to be erased has been or is being erased.