Flash Memory Block Erasure Status Tracking

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Flash memory systems face issues with data reading failures due to incomplete erasure of memory blocks during power-off, leading to potential threshold voltage changes that affect data integrity upon re-powering.

Innovation Solution

Incorporating information bits for each memory block to indicate completion of erasure prior to power-off, allowing for block-wise erasure management and reprogramming upon re-powering to ensure data integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If block-wise erasure is performed during power-off, then erasure completeness may be compromised, but data reading failures occur upon re-powering

Engineering Contradiction:
Improvedata reading reliabilityVSAvoiderasure completeness
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The patent applies preliminary action by setting a preliminary state (erasing in progress) before power-off occurs. The information bit is pre-configured to indicate that erasure is underway, allowing the system to detect and handle the incomplete erasure state upon re-powering, thereby preventing data reading failures while maintaining erasure tracking.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback through the information bit that continuously reflects the erasure state of each memory block. This feedback mechanism allows the system to monitor whether erasure is complete or in progress, enabling appropriate corrective actions (such as completing erasure or skipping the block) upon re-powering, thus resolving the contradiction between reliability and information loss.

Inventive Principle:
Principle #23Feedback

2Reliability

If information bits are added to track erasure status, then data integrity is improved, but memory structure complexity increases

Engineering Contradiction:
Improvedata integrityVSAvoidmemory structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the memory structure into memory blocks, each with an associated information bit. This segmentation allows independent tracking of erasure status for each block without affecting the entire memory structure, thereby improving data integrity while minimizing the increase in overall complexity through localized state tracking.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements local quality by applying the information bit tracking mechanism selectively to individual memory blocks that require erasure status monitoring. This localized approach ensures data integrity for blocks undergoing erasure while avoiding unnecessary complexity in blocks that are not being erased, thus resolving the contradiction between reliability and structural complexity.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11978520B2Method of erasing flash memory and electronic system
Publication Date: 2024.05.07 WUHAN XINXIN SEMICON MFG CO LTD
  • US11978520B2 patent drawing
  • US11978520B2 patent drawing
  • US11978520B2 patent drawing

AI summary

Each memory block in the flash memory is added with corresponding information bit(s) that store(s) information indicating whether erasure of the memory block has been completed before power-off. This allows easily finding out which memory block in the flash memory is undergoing an erase operation at the time of power-off. When the flash memory is powered on again, the information in the corresponding information bit(s) of the memory blocks may be read out and checked to determine whether there is any memory block of which the erasure had not been completed before the last power-off. If so, the memory blocks in the flash memory will be reprogrammed during the re-powering. This can avoid possible failure in reading data from some memory cells in the flash memory.