Two-Stage Voltage Boosting for Flash Memory Block Selection

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Solution Overview

Problem

Existing flash memory devices require high voltage for operations, leading to increased power consumption and occupied area due to the need for multiple stages of charge pumps, especially when external power is low.

Innovation Solution

A non-volatile semiconductor memory device with a block selection element that performs two-stage voltage boosting using a level shifter and a boost circuit with transistors and capacitors, reducing the required high voltage generated by the charge pump and minimizing power consumption and area occupancy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If the number of stages of the charge pump circuit is increased to generate higher voltage, then the required high voltage is achieved, but boosting efficiency decreases and power consumption increases

Engineering Contradiction:
Improvehigh voltage generation capabilityVSAvoidpower consumption
Core Design Contradiction:
StrengthVSUse of energy by moving object

Solution Approach 1:

The voltage boosting function is segmented into two independent stages: the first charge pump circuit generates an intermediate voltage (e.g., 20V), and the second charge pump circuit further boosts it to the final high voltage (e.g., 31V). This segmentation allows each circuit to operate at optimized voltage levels, improving overall boosting efficiency and reducing power consumption compared to a single multi-stage circuit.

Inventive Principle:
Principle #1Segmentation

2Strength

If the number of stages of the charge pump circuit is increased to generate higher voltage, then the required high voltage is achieved, but the occupied area of the charge pump circuit increases

Engineering Contradiction:
Improvehigh voltage generation capabilityVSAvoidoccupied area of charge pump circuit
Core Design Contradiction:
StrengthVSArea of stationary object

Solution Approach 1:

By dividing the charge pump functionality into two separate circuits operating at different voltage stages, the design achieves high voltage generation without requiring a single large multi-stage circuit. Each charge pump circuit can be compactly designed for its specific voltage range, reducing the total occupied area compared to a monolithic high-stage charge pump.

Inventive Principle:
Principle #1Segmentation

3Area of stationary object

If a single-stage charge pump generates high voltage directly, then the circuit area is reduced, but boosting efficiency decreases and power consumption increases

Engineering Contradiction:
Improveoccupied area of charge pump circuitVSAvoidpower consumption
Core Design Contradiction:
Area of stationary objectVSUse of energy by moving object

Solution Approach 1:

The solution segments the voltage boosting into two efficient stages rather than using a single inefficient high-stage circuit. This maintains compact area while improving boosting efficiency at each stage, thereby reducing overall power consumption compared to a single-stage approach that would require excessive stages.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The two-stage voltage boosting reduces the high voltage needed from the charge pump, resulting in decreased power consumption and occupied area, while maintaining effective operation of the flash memory device.

Implementation Method 1

The connection node, after performing first boosting by the operating voltage supplied by the supplying element

Methodology Applied
Scientific EffectVoltage boosting:

Implementation Method 2

a first circuit charging a connection node connected to each gate of the selection transistors, a second circuit connected to the first circuit and boosting a voltage of the connection node

Methodology Applied
Scientific EffectCapacitor charging: Capacitance

Data Source

PatentUS10269409B2Non-volatile semiconductor memory device and driving method for block selection by boosting thereof
Publication Date: 2019.04.23 WINBOND ELECTRONICS CORP
  • US10269409B2 patent drawing
  • US10269409B2 patent drawing
  • US10269409B2 patent drawing

AI summary

A non-volatile semiconductor memory device and a driving method for word lines thereof are provided. A flash memory of the invention includes a memory cell array including blocks and a block selection element selecting the block of the memory cell array based on row address information and including a block selection transistor, a level shifter, a boost circuit and a voltage supplying element. The block selection transistor is connected to each word line of the block. The level shifter supplies a voltage to a node connected to a gate of the block selection transistor. The boost circuit boosts a potential of the node. The voltage supplying element supplies an operation voltage to one of the terminals of the block selection transistor. The node, after performing first boosting by the operating voltage supplied by the supplying element, performs second boosting by the second circuit.