Flash Memory Boot Program Refresh Control via Error Correction
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Solution Overview
Problem
NAND type flash memory experiences read disturb phenomena, leading to increased read errors and reduced data reliability, requiring refresh processing to restore threshold voltage, which is inefficient due to the need for block-level erasure and limited capacity of integrated circuits.
Innovation Solution
An embedded system with a control portion that determines the necessity of refresh processing based on error correction results, utilizing error correction circuits to read, correct, and write back data from flash memory, ensuring proper refresh of the boot program and other data, even with limited storage capacity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If refresh processing is performed periodically on the entire flash memory area, then data reliability is improved, but storage capacity is wasted and processing efficiency deteriorates
Solution Approach 1:
The patent applies local quality by performing refresh processing only on specific blocks that require it rather than the entire flash memory. The control portion identifies blocks with degraded threshold voltages and targets only those blocks for refresh, thereby maintaining data reliability while avoiding unnecessary processing on already healthy blocks.
Solution Approach 2:
The patent implements partial action by executing refresh processing on only the necessary portion of the flash memory (blocks requiring refresh) rather than performing excessive full-area refresh. This selective approach reduces wasted processing cycles while ensuring that blocks needing refresh receive the necessary maintenance.
2Reliability
If refresh processing is performed on boot program in block units, then read errors are reduced, but storage capacity is limited and processing time increases
Solution Approach 1:
The patent applies preliminary action by performing refresh processing on the boot program block before it is needed for system booting. The control portion proactively identifies and refreshes blocks containing the boot program, ensuring they are in optimal condition before the system needs to execute them, thereby preventing read errors during critical boot operations.
Solution Approach 2:
The patent implements feedback by monitoring the threshold voltage status of flash memory blocks and using this information to determine which blocks require refresh. The control portion continuously assesses block conditions and adjusts refresh operations accordingly, creating a closed-loop system that optimizes processing time by only refreshing blocks that actually need it.
3Quantity of substance
If integrated circuit capacity is limited to about 128 KB, then device size is reduced, but storage capacity for programs and data is insufficient
Solution Approach 1:
The patent applies segmentation by dividing the program storage into multiple components: mask ROM for the start program (about 128 KB), built-in RAM for the boot program, and flash memory for the remaining program and data. This segmentation allows the limited-capacity integrated circuit to coexist with larger external storage, effectively solving the storage capacity limitation while maintaining a compact device form factor.
Data Source
AI summary
An embedded system includes: a first storage portion in which a boot program in a basic program stored in a flash memory is developed and stored; a second storage portion in which the basic program is developed and stored according to the boot program developed in the first storage portion; a first error correction circuit configured to perform error correction when reading the boot program; a third storage portion in which information based on an error correction result of the error correction circuit is stored; and a control portion configured to determine propriety of refresh processing on the boot program based on the information based on the error correction result stored in the third storage portion.