Flash Memory Buffer Utilization for Cost Reduction
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Solution Overview
Problem
Conventional flash memory control circuits require a static random access memory (SRAM) to temporarily store data, which increases manufacturing costs due to the need for sufficient memory capacity matching the flash memory storage plane capacity, such as 8 KB.
Innovation Solution
A flash memory control apparatus and method that couples two flash memories with different storage planes and buffers, where valid data from a first storage plane is temporarily stored in a second buffer and then programmed back after an erase cycle, utilizing a data read/write interface and a controller, allowing for reduced buffer capacity requirements by using two 1 KB chunk buffers instead of a single 8 KB SRAM.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a static random access memory (SRAM) with sufficient capacity is disposed in the flash memory control circuit to temporarily store data, then the flash memory control circuit can perform normal erase/program operations, but the manufacturing costs greatly increase
Solution Approach 1:
The patent extracts the temporary storage function from a dedicated SRAM component and relocates it to the existing buffer memory within the flash memory device. Instead of adding an external SRAM to the control circuit, the system uses the flash memory's own buffer (designed for other purposes) as temporary storage, thereby eliminating the need for expensive additional components while maintaining operational reliability
Solution Approach 2:
The buffer memory in the flash memory device is made multi-functional by using it both for its original purpose and as temporary storage for data during erase/program operations. This universal usage allows the same hardware resource to serve multiple functions, eliminating the need for dedicated SRAM while ensuring normal operation can proceed
2Quantity of substance
If a static random access memory (SRAM) with sufficient capacity is disposed in the flash memory control circuit to temporarily store data, then data can be temporarily stored during access operations, but the device complexity and area increase
Solution Approach 1:
The patent merges the temporary storage function with the existing buffer memory structure of the flash memory device. By combining these functions into a single component, the system achieves the required temporary storage capacity without adding separate SRAM circuits, thereby reducing overall device complexity and footprint
3Quantity of substance
If a static random access memory (SRAM) with sufficient capacity is disposed in the flash memory control circuit to temporarily store data, then data can be temporarily stored during access operations, but the manufacturing costs greatly increase
Solution Approach 1:
The flash memory device serves itself by using its own buffer memory as temporary storage during control operations. This self-service approach eliminates the need for external SRAM components that would increase manufacturing costs, as the system utilizes resources already present within its own structure
Data Source
AI summary
A flash memory control apparatus includes a data read/write interface and a controller. The data read/write interface is arranged for coupling a first flash memory and a second flash memory, wherein the first flash memory includes a first storage plane and a first buffer, and the second flash memory includes a second storage plane and a second buffer. The controller is coupled to the data read/write interface, and is arranged for transmitting a plurality of valid data sets stored in the first storage plane to the second buffer through the data read/write interface. After an erase cycle is performed on the first storage plane, the controller further programs the plurality of valid data sets transmitted to the second buffer into the first storage plane.