Flash Memory Write Management Using Cache Blocks

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Solution Overview

Problem

Multi-level cell (MLC) flash memory is prone to data loss due to mutual damage between paired pages during unexpected power-offs or resets, and existing solutions either reduce memory capacity or fail to effectively prevent data loss.

Innovation Solution

A method where data is initially written into cache blocks to prevent mutual damage, and then written back to the target block during a controlled shut-down or when the cache reaches saturation, allowing for data restoration in case of errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If data are written directly into paired pages (MSB and LSB) in MLC flash memory, then write speed is improved, but data integrity deteriorates due to mutual damage during unexpected power-off or reset

Engineering Contradiction:
Improvewrite speedVSAvoiddata integrity
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The write operation is segmented into two distinct phases: first writing data to a single page type (MSB or LSB) in the target block, then writing to the paired page type in subsequent operations. This segmentation prevents simultaneous writing to both paired pages, eliminating the mutual damage problem while maintaining write speed through efficient phase transitions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system performs preliminary writing to one page type (e.g., MSB) before writing to its paired page (LSB). This preliminary action ensures that if power is lost during the process, only the first page type is affected while the second remains intact, providing automatic data protection without requiring complex error correction mechanisms.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If a writable region is limited within a single-type page between paired pages, then data integrity is improved, but memory capacity is significantly reduced

Engineering Contradiction:
Improvedata integrityVSAvoidmemory capacity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The system dynamically switches between writing to MSB pages and LSB pages based on operational phase and cache status. By alternating write targets between the two page types within the same block, the system utilizes the full memory capacity while maintaining data integrity through the sequential write approach, eliminating the need to restrict usage to only one page type.

Inventive Principle:
Principle #15Dynamics

3Reliability

If data in paired page B is duplicated to a backup region when writing into page A, then data integrity is improved, but device complexity and storage overhead are increased

Engineering Contradiction:
Improvedata integrityVSAvoidcomplexity of write operation
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Instead of creating separate backup copies in external regions, the system uses the paired page structure itself as an inherent backup mechanism. The first page written serves as the primary data storage, while the second page type can serve as a natural backup target, eliminating the need for additional backup regions and reducing system complexity.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS8984213B2Electronic system and memory managing method thereof
Publication Date: 2015.03.17 MEDIATEK INC
  • US8984213B2 patent drawing
  • US8984213B2 patent drawing
  • US8984213B2 patent drawing

AI summary

A method for managing a flash memory including a plurality of blocks is provided. Each block includes a plurality of sets of a first page and a second page configured in pair. In response to a request for writing target data into a target block, at least one cache block is selected from the blocks. The target data is then written into the first pages in the at least one cache block. When a write-back condition is established, the target data is written from the cache block back to the target block.