Flash Memory Cell Coupling Reduction via Post-Programming
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Solution Overview
Problem
Flash memory devices experience a decrease in data read reliability due to widening threshold voltage distributions caused by coupling between cells, especially in multi-level cells, which becomes more pronounced as the number of bits stored in a single memory cell increases.
Innovation Solution
A flash memory device and method that involves performing an erasing operation followed by a post-programming operation to control the threshold voltage of memory cells, reducing the difference between erased and programmed states, and using a verify voltage of 0V or greater to narrow the threshold voltage distribution, thereby minimizing the coupling effect between cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-level cell technology is used to increase storage capacity, then the storage capacity per cell increases, but the threshold voltage distribution widens due to coupling between cells, reducing data read reliability
Solution Approach 1:
The patent applies preliminary action by performing a post-programming operation after the main programming operation to adjust and narrow the threshold voltage distribution. This preliminary corrective action counteracts the coupling effect that occurred during the main programming phase, ensuring the threshold voltage margin is restored before data reading occurs.
Solution Approach 2:
The patent changes the programming parameter by introducing a post-programming operation with different voltage parameters (verify voltage of 0V or greater) to modify the threshold voltage distribution. This parameter change narrows the distribution and reduces coupling effects, thereby improving data read reliability while maintaining high storage capacity.
2Ease of operation
If a charging pump generating negative voltages is used during verify operation, then the verify operation can be performed, but the device complexity increases
Solution Approach 1:
The patent inverts the conventional approach by using a verify voltage of 0V or greater instead of requiring negative voltages generated by a charging pump. This inversion simplifies the device structure by eliminating the charging pump while still enabling the verify operation to function correctly.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution improves data read reliability by reducing the variation in threshold voltage caused by cell coupling, ensuring a sufficient margin between threshold voltages in different data states, and eliminating the need for a charging pump that generates negative voltages during the verify operation.
Implementation Method 1
a flash memory has lower power consumption and a shorter access time... a programming operation is performed only once on all the memory cells coupled to a single word line... stores and erases data according to the F-N tunneling method
Implementation Method 2
using a verify voltage of 0V or greater to narrow the threshold voltage distribution, thereby minimizing the coupling effect between cells
Data Source
AI summary
Embodiments of the invention provide a flash memory device that can improve the reliability of a reading operation by minimizing a variation in the threshold voltage distribution that occurs due to coupling between cells, and a method of driving the flash memory device. In an embodiment of the invention, the method of driving the flash memory includes: performing an erasing operation on memory cells; after the performing the erasing operation, performing a post-programming operation to control a threshold voltage of the memory cells; and after performing the post-programming operation, performing a main programming operation on the memory cells, wherein the performing of the post-programming operation comprises increasing the threshold voltage of the memory cells in an erased state, thereby reducing a difference in the threshold voltage between the memory cells in the erased state and the memory cells in the programmed state.


