Flash Memory Cell Recovery During Block Erase

Solution Overview

Problem

Nonvolatile memory devices, such as NAND-type flash memories, face challenges in efficiently managing memory cell states during erase operations, leading to potential over-erasure and reduced device lifetime due to repeated program/erase cycles.

Innovation Solution

A nonvolatile memory system with a memory controller that performs memory cell recovery operations by partially programming erased cells before block erasure, using a timer for one-shot programming and verify voltages to achieve uniform threshold voltages, thereby reducing the likelihood of over-erasure and extending device lifespan.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If memory cells are repeatedly programmed and erased, then memory capacity is utilized, but device lifetime is reduced due to over-erasure

Engineering Contradiction:

Improvememory capacity utilizationVSAvoiddevice lifetime

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by performing a recovery programming operation on erased memory cells before the block erase operation. This preliminary programming raises the threshold voltage of erased cells from a very negative state (e.g., -3V) to a less negative state (e.g., -1V), preventing over-erasure and extending device lifetime while maintaining memory capacity utilization

Inventive Principle:

Principle #10Preliminary action

2Reliability

If all erased memory cells are programmed before block erase, then over-erasure is prevented, but operation time is increased

Engineering Contradiction:

Improveover-erasure preventionVSAvoidoperation time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent applies local quality by selectively programming only the erased memory cells in the block before the block erase operation, rather than programming all cells. This targeted approach prevents over-erasure of erased cells while avoiding unnecessary programming time for already programmed cells, thus balancing reliability improvement with operation time efficiency

Inventive Principle:

Principle #3Local quality

3Speed

If memory cells are erased without prior programming, then operation speed is maintained, but threshold voltage uniformity deteriorates

Engineering Contradiction:

Improveerase operation speedVSAvoidthreshold voltage uniformity

Core Design Contradiction:

SpeedVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by performing a recovery programming operation on erased memory cells before the block erase operation. This preliminary programming raises the threshold voltage of erased cells from a very negative state (e.g., -3V) to a less negative state (e.g., -1V), preventing over-erasure and extending device lifetime while maintaining memory capacity utilization

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS8274840B2Nonvolatile memory devices having built-in memory cell recovery during block erase and methods of operating same

Publication Date: 2012.09.25 SAMSUNG ELECTRONICS CO LTD

AI summary

Nonvolatile memory devices include support memory cell recovery during operations to erase blocks of nonvolatile (e.g., flash) memory cells. A nonvolatile memory system includes a flash memory device and a memory controller electrically coupled to the flash memory device. The memory controller is configured to control memory cell recovery operations within the flash memory device by issuing a first instruction(s) to the flash memory device that causes erased memory cells in the block of memory to become at least partially programmed memory cells and then issuing a second instruction(s) to the flash memory device that causes the at least partially programmed memory cells become fully erased.