Flash Memory Charge Level Compensation for Storage Density
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional flash memory technologies using multiple data levels per cell are prone to errors during read and write operations and are limited to storing data levels corresponding to even powers of two, which restricts their capacity and reliability.
Innovation Solution
A flash memory configuration with programmable target charge levels that allow for non-integer powers of two data values, along with error correction and compensation mechanisms, including a control arrangement to adjust charge levels based on performance characteristics, enhances data storage and retrieval accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple data levels are stored within a single memory cell to increase storage capacity, then storage density is improved, but error proneness during read and write operations increases
Solution Approach 1:
The patent applies preliminary action by performing compensation calculations before actual data storage. The system pre-determines compensation values based on performance characteristics and applies them during write operations, preventing errors before they occur rather than correcting them after retrieval
Solution Approach 2:
The patent implements feedback mechanisms by measuring actual performance characteristics of memory cells and using this information to adjust compensation values. The system continuously monitors and refines compensation based on observed behavior, creating a closed-loop control system that improves reliability while maintaining high storage density
2Device complexity
If conventional flash memory is limited to storing data levels corresponding to even powers of two, then device complexity is reduced, but storage capacity is restricted
Solution Approach 1:
The patent applies dynamics by making the memory system adaptable and reconfigurable. The compensation mechanism allows the system to dynamically adjust to different data level configurations, enabling support for non-traditional storage schemes (including odd powers of two and non-integer values) without requiring fundamental hardware changes, thus increasing capacity while managing complexity through software-controlled flexibility
Solution Approach 2:
The patent utilizes parameter changes by modifying the interpretation and handling of charge levels in memory cells. By changing how data levels are defined and compensated for (allowing non-integer powers of two), the system extracts more storage capacity from the same physical structure without increasing hardware complexity
3Quantity of substance
If target charge levels are made programmably movable to define non-integer powers of two data values, then storage capacity is increased, but manufacturing precision requirements increase
Solution Approach 1:
The patent applies self-service by enabling the memory system to automatically characterize its own performance and generate appropriate compensation values without external intervention. The system performs self-diagnosis and self-adjustment, reducing the need for high-precision manual manufacturing by allowing the device to compensate for its own variations
Solution Approach 2:
The patent uses parameter changes to transform fixed manufacturing specifications into flexible, programmable parameters. By making target charge levels adjustable and compensatable, the system reduces sensitivity to manufacturing variations, allowing broader tolerance ranges while maintaining accurate data storage at non-integer power levels
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases data storage capacity while maintaining reliability, allowing for error detection and correction, and supports a higher number of distinct data levels per memory cell, thereby improving overall system performance and storage density.
Implementation Method 1
each memory cell has a charge storage capacity for use in implementing digital storage
Implementation Method 2
accessing an arrangement of memory cells to characterize a performance characteristic
Implementation Method 3
subsequently accessing the cell array device to apply compensation based on the value of the performance characteristic
Data Source
AI summary
A method and system for storing and retrieving data using flash memory devices. One example system includes an apparatus within a flash memory configuration. The flash memory configuration includes a plurality of memory cells, where each memory cell has a charge storage capacity for use in implementing digital storage. The apparatus includes a processing arrangement configured to access each of the memory cells in a write operation and a read operation. The apparatus also includes an instruction set for instructing the processor to impose target charge levels for defining a plurality of data values for each of the memory cells. The target charge levels are programmably movable with respect to the charge storage capacity.